0xc0170

0xc0170

Implementation specific

Member Since 9 years ago

@ARMmbed , Germany

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Activity
Jan
25
17 hours ago
pull request

0xc0170 merge to ARMmbed/mbed-os

0xc0170
0xc0170

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Summary of changes

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Impact of changes

Migration actions required

Documentation

None


Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[X] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


Jan
24
1 day ago
Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

TDBStore refactoring

Description

Summary of change

Small fixes, refactoring and one functionality change to TDBStore:

  • TDBStore: Don't copy more data than what we can hold
  • TDBStore: Move Assert to init(), so Block parameter are initialised correctly
  • Do not require Flash device for TDBStore <-- Functional change, but not API change
  • TDBStore: Do no garbage_collect() on init()
  • TDBStore: Keep copy of reserved data on both areas.
  • TDBStore: Erase one program unit more, when cleaning areas

Assuming underlying device was FLASH device was error prone, as we cannot trust erase values. Logic has changed to that we always erase before writing to new area.

Documentation

We can remove then requirements from documentation that TDBStore would require FLASH device. After these changes, it does not anymore.

More module+unit tests have been implemented but can only be submitted once Mbed CRC changes are submitted into master.


Pull request type

[] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[X] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[X] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers

@VeijoPesonen


Release Notes

Summary of changes

TDBStore does not anymore require Flash based block device.

Impact of changes

Migration actions required

0xc0170
0xc0170

@0xc0170 @adbridge - could this patch be ported to a 5.15.x release?

We are not able to port this feature request to 5.15 branch. If it's required (not certain which parts are, as this pull request includes multiple changes), it needs to be contributed.

Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Summary of changes

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Impact of changes

Migration actions required

Documentation

None


Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[X] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


0xc0170
0xc0170

@wally0258 would you be able to add test logs or describe how this was tested?

pull request

0xc0170 merge to ARMmbed/mbed-os

0xc0170
0xc0170

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Summary of changes

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Impact of changes

Migration actions required

Documentation

None


Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[X] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


open pull request

0xc0170 wants to merge ARMmbed/mbed-os

0xc0170
0xc0170

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Summary of changes

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Impact of changes

Migration actions required

Documentation

None


Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[X] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


0xc0170
0xc0170

Let's fix the year -2022

pull request

0xc0170 merge to ARMmbed/mbed-os

0xc0170
0xc0170

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Summary of changes

Add Nuvoton NuMaker-IoT-M263A CAN bus support

Impact of changes

Migration actions required

Documentation

None


Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[X] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

ST: correct LED pins for DISCO_L562QE

Summary of changes

LED pin values ware not correct for DISCO_L562QE

Impact of changes

Migration actions required

Documentation


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


pull request

0xc0170 merge to ARMmbed/mbed-os

0xc0170
0xc0170

ST: correct LED pins for DISCO_L562QE

Summary of changes

LED pin values ware not correct for DISCO_L562QE

Impact of changes

Migration actions required

Documentation


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


Jan
17
1 week ago
Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

TDBStore: master record included in RAM table (causing all sorts of problems)

Description of defect

To start from the end: Problem is that TDBStore holds a pointer to the master record in its RAM table. This can lead to all sorts of issues. Naming a few:

  1. Master record key can be caught by iterators (see example code below). This shouldn't happen,as this key is internal.
  2. GC process copies all the keys from RAM table to the standby area before areas are flipped. As this includes the master record as a regular one now, storage will gradually get eaten up due to this bug.

Bug lies in this line. If we add _master_record_size, it will fix the bug (will start iteration on storage from after the master record).

Target(s) affected by this defect ?

All targets

Toolchain(s) (name and version) displaying this defect ?

All toolchains

What version of Mbed-os are you using (tag or sha) ?

Hash is 2a4e48179dd7f67706cbdc7c6bda47d82091c98b, but this also happens in much earlier versions (5.x).

What version(s) of tools are you using. List all that apply (E.g. mbed-cli)

N/A

How is this defect reproduced ?

Following code, written by @maciejbocianski, iterates over all keys in storage. Iterator catches the master record key as well (which it shouldn't).

kv_iterator_t kvstore_it;
  kv_info_t info;
  int ret = 0;
  size_t kv_store_bytes_used = 0;
  uint16_t key_count = 0;
  char kv_key_out[KV_STORE_MAX_KEY_LENGTH] = {0};
  kv_iterator_open(&kvstore_it, NULL);
  memset(kv_key_out, 0, KV_STORE_MAX_KEY_LENGTH);
  while(kv_iterator_next(kvstore_it, kv_key_out, KV_STORE_MAX_KEY_LENGTH) != MBED_ERROR_ITEM_NOT_FOUND) {
    ret = kv_get_info(kv_key_out, &info);
    if(ret != MBED_SUCCESS) {
      tr_warn("failed to retrieve %s, error: %d", kv_key_out, err_code(ret));
    } else {
      kv_store_bytes_used += info.size;
      tr_debug("key: %s", kv_key_out);
      kv_store_bytes_used += strlen(kv_key_out);
    }
    memset(kv_key_out, 0, KV_STORE_MAX_KEY_LENGTH);
    key_count++;
  }
  kv_iterator_close(kvstore_it);

Attempting to run this code on an existing TDBStore will eventually output the following trace:

[WARN][STORAGE]: failed to retrieve TDBS, error: 326
0xc0170
0xc0170

Bug lies in this line. If we add _master_record_size, it will fix the bug (will start iteration on storage from after the master record).

@davidsaada Thanks for the report. Will it make sense to create a pull request with the fix?

push

0xc0170 push ARMmbed/mbed-os

0xc0170
0xc0170

Fix STM32 SPI 16-bit logic

Update SPI logic to process 16 bit words in the same way by sync/async, 3/4 wires modes:

  • fix 3-wire synchronous transmission to move 2 or more bytes between buffer and SPI register per word tarnsmission
  • fix 4-wire synchronous transmission to move 2 or more bytes between buffer and SPI register per word tarnsmission
0xc0170
0xc0170

Fix STM32 SPI async API for STM32H7 (SPI_IP_VERSION_V2)

By default, HAL functions (HAL_SPI_TransmitReceive_IT/HAL_SPI_Transmit_IT/HAL_SPI_Receive_IT) assume that SPI is disabled between function invocation. It's needed to set transfer size (CR2 register), that can be modified only if SPI disabled. But stm32_spi_api.c keeps SPI enabled after initialization.

This commit adds helper code for STM32H7 (SPI_IP_VERSION_V2) that disables SPI before HAL_SPI_TransmitReceive_IT/HAL_SPI_Transmit_IT/HAL_SPI_Receive_IT and after end of transaction for HAL API compatibility.

0xc0170
0xc0170

Merge pull request #15206 from vznncv/iss_stm32_spi_16_bit

STM32: fix SPI 16 bit mode

commit sha: 1443257e40c97141c975f1c5cd7f4cf308a58b5e

push time in 1 week ago
pull request

0xc0170 pull request ARMmbed/mbed-os

0xc0170
0xc0170

STM32: fix SPI 16 bit mode

Summary of changes

The current low-level STM32 SPI API implementation (file stm_spi_api.c) doesn't processes SPI frames in 16 bit mode correctly. If we need to sent 2 bytes 0x11 0x22 in 16 bit mode, SPI device sends 4 bytes (extra 0x00 byte is added before each one) 0x00 0x11 0x00 0x22. This pull request fixes this behaviour to send correct data: 0x22 0x11

issue: #15113 related pull request: #15115

Impact of changes

Fix data frame format of SPI in 16 bit mode for all STM32 devices.

Migration actions required

Documentation

Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

SPI monitoring with logic analyzer

This demo program simply writes bytes to SPI device with loopback (MISO is connected to MOSI). It allows checking SPI frames with logic analyzer.

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission without fixes:

  • 3-wire mode, synchronous transmission

    no_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    no_fix_3wire_async

  • 4-wire mode, synchronous transmission:

    no_fix_4wire_sync

  • 4-wire mode, asynchronous transmission:

    no_fix_4wire_async

  • full results. Console logs: no_fix_serial_logs.txt, logical analyzer data (sigrok format): no_fix_data.zip

Although we transmit the same data, synchronous and asynchronous SPI API give different results (asynchronous API transmits data correctly).

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission after fixes:

  • 3-wire mode, synchronous transmission:

    with_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    with_fix_3wire_async

  • 4-wire mode, synchronous transmission:

with_fix_4wire_sync

All SPI APIs give the same result after fix.

SPI test with sensor BMX160 (3 wire SPI mode)

This demo writes data to BMX160 sensor, reads them back and compares sent and received bytes. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 562500 success success success success
2 sync burst_w8_r8 1000000 562500 success success success success
3 sync single_w16_r8 1000000 562500 success success success success
4 sync burst_w16_r8 1000000 562500 success success success success
5 sync single_w8_r16 1000000 562500 success success success success
6 sync burst_w8_r16 1000000 562500 success success success success
7 sync single_w8_r8 200000 281250 success success success success
8 sync burst_w8_r8 200000 281250 success success success success
9 sync single_w16_r8 200000 281250 success success success success
10 sync burst_w16_r8 200000 281250 success success success success
11 sync single_w8_r16 200000 281250 success success success success
12 sync burst_w8_r16 200000 281250 success success success success
13 sync single_w8_r8 10000000 9000000 success success success success
14 sync burst_w8_r8 10000000 9000000 success success success success
15 sync single_w16_r8 10000000 9000000 success success success success
16 sync burst_w16_r8 10000000 9000000 success success success success
17 sync single_w8_r16 10000000 9000000 success success success success
18 sync burst_w8_r16 10000000 9000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 562500 success error success error
20 async burst_w8_r8 1000000 562500 success error success error
21 async single_w16_r8 1000000 562500 success error success error
22 async burst_w16_r8 1000000 562500 success error success error
23 async single_w8_r16 1000000 562500 success error success error
24 async burst_w8_r16 1000000 562500 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 281250 success error success error
26 async burst_w8_r8 200000 281250 success error success error
27 async single_w16_r8 200000 281250 success error success error
28 async burst_w16_r8 200000 281250 success error success error
29 async single_w8_r16 200000 281250 success error success error
30 async burst_w8_r16 200000 281250 success error success error
31 async single_w8_r8 10000000 9000000 success error error error
32 async burst_w8_r8 10000000 9000000 success error error error
33 async single_w16_r8 10000000 9000000 success error error error
34 async burst_w16_r8 10000000 9000000 success error error error
35 async single_w8_r16 10000000 9000000 success error success error
36 async burst_w8_r16 10000000 9000000 success error error error

full logs: main_3wire_stm32f103c8_logs.txt

  • STM32F411CE
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 781250 success success success success
2 sync burst_w8_r8 1000000 781250 success success success success
3 sync single_w16_r8 1000000 781250 success success success success
4 sync burst_w16_r8 1000000 781250 success success success success
5 sync single_w8_r16 1000000 781250 success success success success
6 sync burst_w8_r16 1000000 781250 success success success success
7 sync single_w8_r8 200000 390625 success success success success
8 sync burst_w8_r8 200000 390625 success success success success
9 sync single_w16_r8 200000 390625 success success success success
10 sync burst_w16_r8 200000 390625 success success success success
11 sync single_w8_r16 200000 390625 success success success success
12 sync burst_w8_r16 200000 390625 success success success success
13 sync single_w8_r8 10000000 6250000 success success success success
14 sync burst_w8_r8 10000000 6250000 success success success success
15 sync single_w16_r8 10000000 6250000 success success success success
16 sync burst_w16_r8 10000000 6250000 success success success success
17 sync single_w8_r16 10000000 6250000 success success success success
18 sync burst_w8_r16 10000000 6250000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 781250 success error success error
20 async burst_w8_r8 1000000 781250 success error success error
21 async single_w16_r8 1000000 781250 success error success error
22 async burst_w16_r8 1000000 781250 success error success error
23 async single_w8_r16 1000000 781250 success error success error
24 async burst_w8_r16 1000000 781250 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 390625 success error success error
26 async burst_w8_r8 200000 390625 success error success error
27 async single_w16_r8 200000 390625 success error success error
28 async burst_w16_r8 200000 390625 success error success error
29 async single_w8_r16 200000 390625 success error success error
30 async burst_w8_r16 200000 390625 success error success error
31 async single_w8_r8 10000000 6250000 success error success error
32 async burst_w8_r8 10000000 6250000 success error error error
33 async single_w16_r8 10000000 6250000 success error error error
34 async burst_w16_r8 10000000 6250000 success error error error
35 async single_w8_r16 10000000 6250000 success error success error
36 async burst_w8_r16 10000000 6250000 success error success error

full logs: main_3wire_stm32f411ce_logs.txt

  • STM32H743VI
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 625000 success success success success
2 sync burst_w8_r8 1000000 625000 success success success success
3 sync single_w16_r8 1000000 625000 success success success success
4 sync burst_w16_r8 1000000 625000 success success success success
5 sync single_w8_r16 1000000 625000 success success success success
6 sync burst_w8_r16 1000000 625000 success success success success
7 sync single_w8_r8 200000 156250 success success success success
8 sync burst_w8_r8 200000 156250 success success success success
9 sync single_w16_r8 200000 156250 success success success success
10 sync burst_w16_r8 200000 156250 success success success success
11 sync single_w8_r16 200000 156250 success success success success
12 sync burst_w8_r16 200000 156250 success success success success
13 sync single_w8_r8 10000000 5000000 success success success success
14 sync burst_w8_r8 10000000 5000000 success success success success
15 sync single_w16_r8 10000000 5000000 success success success success
16 sync burst_w16_r8 10000000 5000000 success success success success
17 sync single_w8_r16 10000000 5000000 success success success success
18 sync burst_w8_r16 10000000 5000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 625000 success success success success
20 async burst_w8_r8 1000000 625000 success success success success
21 async single_w16_r8 1000000 625000 success success success success
22 async burst_w16_r8 1000000 625000 success success success success
23 async single_w8_r16 1000000 625000 success success success success
24 async burst_w8_r16 1000000 625000 success success success success
25 async (+ abort_all_transfers after) single_w8_r8 200000 156250 success success success success
26 async burst_w8_r8 200000 156250 success success success success
27 async single_w16_r8 200000 156250 success success success success
28 async burst_w16_r8 200000 156250 success success success success
29 async single_w8_r16 200000 156250 success success success success
30 async burst_w8_r16 200000 156250 success success success success
31 async single_w8_r8 10000000 5000000 success success success success
32 async burst_w8_r8 10000000 5000000 success success success success
33 async single_w16_r8 10000000 5000000 success success success success
34 async burst_w16_r8 10000000 5000000 success success success success
35 async single_w8_r16 10000000 5000000 success success success success
36 async burst_w8_r16 10000000 5000000 success success success success

full logs: main_3wire_stm32h743vi_logs.txt

Result notes:

  1. Result tables have the "case name" column with value <single|burst>_w<8|16>_r<8|16> that means:
    • single - test sends single SPI data frame to BMX160 and then receives single SPI data frame
    • burst - test sends multiple SPI data frames to BMX160 and then receives multiple SPI data frames
    • w<8|16> - test sends SPI data frames in 8/16 bit mode
    • r<8|16> - test receives SPI data frames in 8/16 bit mode
  2. Asynchronous API doesn't work correctly in SPI IP version 1 (STM32F103C8 and STM32F411CE) due HAL library usage that doesn't implement correct data reading with interrupts (it doesn't disable SPI in time, that causes dummy reads).

SPI loopback test (4 wire SPI mode)

This demo sends and receives data with SPI loopback. After data transmission it checks that sent and received data is the same. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 562500 success success success
2 multiple word write/read 1000000 562500 success success success
3 multiple word write/read async 1000000 562500 success success success
4 multiple word write/read with default fill 1000000 562500 success success success
5 single word write/read 200000 281250 success success success
6 multiple word write/read 200000 281250 success success success
7 multiple word write/read async 200000 281250 success success success
8 multiple word write/read with default fill 200000 281250 success success success
9 single word write/read 10000000 9000000 success success success
10 multiple word write/read 10000000 9000000 success success success
11 multiple word write/read async 10000000 9000000 success success success
12 multiple word write/read with default fill 10000000 9000000 success success success

full logs: main_4wire_stm32f103c8_logs.txt

  • STM32F411CE
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 781250 success success success
2 multiple word write/read 1000000 781250 success success success
3 multiple word write/read async 1000000 781250 success success success
4 multiple word write/read with default fill 1000000 781250 success success success
5 single word write/read 200000 390625 success success success
6 multiple word write/read 200000 390625 success success success
7 multiple word write/read async 200000 390625 success success success
8 multiple word write/read with default fill 200000 390625 success success success
9 single word write/read 10000000 6250000 success success success
10 multiple word write/read 10000000 6250000 success success success
11 multiple word write/read async 10000000 6250000 success success success
12 multiple word write/read with default fill 10000000 6250000 success success success

full logs: main_4wire_stm32f411ce_logs.txt

  • STM32H743VI
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 625000 success success success
2 multiple word write/read 1000000 625000 success success success
3 multiple word write/read asprojectync 1000000 625000 success success success
4 multiple word write/read with default fill 1000000 625000 success success success
5 single word write/read 200000 156250 success success success
6 multiple word write/read 200000 156250 success success success
7 multiple word write/read async 200000 156250 success success success
8 multiple word write/read with default fill 200000 156250 success success success
9 single word write/read 10000000 5000000 success success success
10 multiple word write/read 10000000 5000000 success success success
11 multiple word write/read async 10000000 5000000 success success success
12 multiple word write/read with default fill 10000000 5000000 success success success

full logs: main_4wire_stm32h743vi_logs.txt


Reviewers


push

0xc0170 push ARMmbed/mbed-os

0xc0170
0xc0170

Add USBDEVICE to NUCLEO_F722ZE target

USB was missing from NUCLEO_F722ZE but is present and working on the board.

0xc0170
0xc0170

Merge pull request #15205 from mikrodust-henrikp/add_usbdevice_to_nucleo_f722ze

Add USBDEVICE to NUCLEO_F722ZE target

commit sha: d234b35aee150e031dc10757112537579b0f17c3

push time in 1 week ago
pull request

0xc0170 pull request ARMmbed/mbed-os

0xc0170
0xc0170

Add USBDEVICE to NUCLEO_F722ZE target

USB was missing from NUCLEO_F722ZE but is present and working on the board.

Summary of changes

Impact of changes

Migration actions required

Documentation


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

STM32: fix SPI 16 bit mode

Summary of changes

The current low-level STM32 SPI API implementation (file stm_spi_api.c) doesn't processes SPI frames in 16 bit mode correctly. If we need to sent 2 bytes 0x11 0x22 in 16 bit mode, SPI device sends 4 bytes (extra 0x00 byte is added before each one) 0x00 0x11 0x00 0x22. This pull request fixes this behaviour to send correct data: 0x22 0x11

issue: #15113 related pull request: #15115

Impact of changes

Fix data frame format of SPI in 16 bit mode for all STM32 devices.

Migration actions required

Documentation

Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

SPI monitoring with logic analyzer

This demo program simply writes bytes to SPI device with loopback (MISO is connected to MOSI). It allows checking SPI frames with logic analyzer.

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission without fixes:

  • 3-wire mode, synchronous transmission

    no_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    no_fix_3wire_async

  • 4-wire mode, synchronous transmission:

    no_fix_4wire_sync

  • 4-wire mode, asynchronous transmission:

    no_fix_4wire_async

  • full results. Console logs: no_fix_serial_logs.txt, logical analyzer data (sigrok format): no_fix_data.zip

Although we transmit the same data, synchronous and asynchronous SPI API give different results (asynchronous API transmits data correctly).

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission after fixes:

  • 3-wire mode, synchronous transmission:

    with_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    with_fix_3wire_async

  • 4-wire mode, synchronous transmission:

with_fix_4wire_sync

All SPI APIs give the same result after fix.

SPI test with sensor BMX160 (3 wire SPI mode)

This demo writes data to BMX160 sensor, reads them back and compares sent and received bytes. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 562500 success success success success
2 sync burst_w8_r8 1000000 562500 success success success success
3 sync single_w16_r8 1000000 562500 success success success success
4 sync burst_w16_r8 1000000 562500 success success success success
5 sync single_w8_r16 1000000 562500 success success success success
6 sync burst_w8_r16 1000000 562500 success success success success
7 sync single_w8_r8 200000 281250 success success success success
8 sync burst_w8_r8 200000 281250 success success success success
9 sync single_w16_r8 200000 281250 success success success success
10 sync burst_w16_r8 200000 281250 success success success success
11 sync single_w8_r16 200000 281250 success success success success
12 sync burst_w8_r16 200000 281250 success success success success
13 sync single_w8_r8 10000000 9000000 success success success success
14 sync burst_w8_r8 10000000 9000000 success success success success
15 sync single_w16_r8 10000000 9000000 success success success success
16 sync burst_w16_r8 10000000 9000000 success success success success
17 sync single_w8_r16 10000000 9000000 success success success success
18 sync burst_w8_r16 10000000 9000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 562500 success error success error
20 async burst_w8_r8 1000000 562500 success error success error
21 async single_w16_r8 1000000 562500 success error success error
22 async burst_w16_r8 1000000 562500 success error success error
23 async single_w8_r16 1000000 562500 success error success error
24 async burst_w8_r16 1000000 562500 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 281250 success error success error
26 async burst_w8_r8 200000 281250 success error success error
27 async single_w16_r8 200000 281250 success error success error
28 async burst_w16_r8 200000 281250 success error success error
29 async single_w8_r16 200000 281250 success error success error
30 async burst_w8_r16 200000 281250 success error success error
31 async single_w8_r8 10000000 9000000 success error error error
32 async burst_w8_r8 10000000 9000000 success error error error
33 async single_w16_r8 10000000 9000000 success error error error
34 async burst_w16_r8 10000000 9000000 success error error error
35 async single_w8_r16 10000000 9000000 success error success error
36 async burst_w8_r16 10000000 9000000 success error error error

full logs: main_3wire_stm32f103c8_logs.txt

  • STM32F411CE
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 781250 success success success success
2 sync burst_w8_r8 1000000 781250 success success success success
3 sync single_w16_r8 1000000 781250 success success success success
4 sync burst_w16_r8 1000000 781250 success success success success
5 sync single_w8_r16 1000000 781250 success success success success
6 sync burst_w8_r16 1000000 781250 success success success success
7 sync single_w8_r8 200000 390625 success success success success
8 sync burst_w8_r8 200000 390625 success success success success
9 sync single_w16_r8 200000 390625 success success success success
10 sync burst_w16_r8 200000 390625 success success success success
11 sync single_w8_r16 200000 390625 success success success success
12 sync burst_w8_r16 200000 390625 success success success success
13 sync single_w8_r8 10000000 6250000 success success success success
14 sync burst_w8_r8 10000000 6250000 success success success success
15 sync single_w16_r8 10000000 6250000 success success success success
16 sync burst_w16_r8 10000000 6250000 success success success success
17 sync single_w8_r16 10000000 6250000 success success success success
18 sync burst_w8_r16 10000000 6250000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 781250 success error success error
20 async burst_w8_r8 1000000 781250 success error success error
21 async single_w16_r8 1000000 781250 success error success error
22 async burst_w16_r8 1000000 781250 success error success error
23 async single_w8_r16 1000000 781250 success error success error
24 async burst_w8_r16 1000000 781250 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 390625 success error success error
26 async burst_w8_r8 200000 390625 success error success error
27 async single_w16_r8 200000 390625 success error success error
28 async burst_w16_r8 200000 390625 success error success error
29 async single_w8_r16 200000 390625 success error success error
30 async burst_w8_r16 200000 390625 success error success error
31 async single_w8_r8 10000000 6250000 success error success error
32 async burst_w8_r8 10000000 6250000 success error error error
33 async single_w16_r8 10000000 6250000 success error error error
34 async burst_w16_r8 10000000 6250000 success error error error
35 async single_w8_r16 10000000 6250000 success error success error
36 async burst_w8_r16 10000000 6250000 success error success error

full logs: main_3wire_stm32f411ce_logs.txt

  • STM32H743VI
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 625000 success success success success
2 sync burst_w8_r8 1000000 625000 success success success success
3 sync single_w16_r8 1000000 625000 success success success success
4 sync burst_w16_r8 1000000 625000 success success success success
5 sync single_w8_r16 1000000 625000 success success success success
6 sync burst_w8_r16 1000000 625000 success success success success
7 sync single_w8_r8 200000 156250 success success success success
8 sync burst_w8_r8 200000 156250 success success success success
9 sync single_w16_r8 200000 156250 success success success success
10 sync burst_w16_r8 200000 156250 success success success success
11 sync single_w8_r16 200000 156250 success success success success
12 sync burst_w8_r16 200000 156250 success success success success
13 sync single_w8_r8 10000000 5000000 success success success success
14 sync burst_w8_r8 10000000 5000000 success success success success
15 sync single_w16_r8 10000000 5000000 success success success success
16 sync burst_w16_r8 10000000 5000000 success success success success
17 sync single_w8_r16 10000000 5000000 success success success success
18 sync burst_w8_r16 10000000 5000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 625000 success success success success
20 async burst_w8_r8 1000000 625000 success success success success
21 async single_w16_r8 1000000 625000 success success success success
22 async burst_w16_r8 1000000 625000 success success success success
23 async single_w8_r16 1000000 625000 success success success success
24 async burst_w8_r16 1000000 625000 success success success success
25 async (+ abort_all_transfers after) single_w8_r8 200000 156250 success success success success
26 async burst_w8_r8 200000 156250 success success success success
27 async single_w16_r8 200000 156250 success success success success
28 async burst_w16_r8 200000 156250 success success success success
29 async single_w8_r16 200000 156250 success success success success
30 async burst_w8_r16 200000 156250 success success success success
31 async single_w8_r8 10000000 5000000 success success success success
32 async burst_w8_r8 10000000 5000000 success success success success
33 async single_w16_r8 10000000 5000000 success success success success
34 async burst_w16_r8 10000000 5000000 success success success success
35 async single_w8_r16 10000000 5000000 success success success success
36 async burst_w8_r16 10000000 5000000 success success success success

full logs: main_3wire_stm32h743vi_logs.txt

Result notes:

  1. Result tables have the "case name" column with value <single|burst>_w<8|16>_r<8|16> that means:
    • single - test sends single SPI data frame to BMX160 and then receives single SPI data frame
    • burst - test sends multiple SPI data frames to BMX160 and then receives multiple SPI data frames
    • w<8|16> - test sends SPI data frames in 8/16 bit mode
    • r<8|16> - test receives SPI data frames in 8/16 bit mode
  2. Asynchronous API doesn't work correctly in SPI IP version 1 (STM32F103C8 and STM32F411CE) due HAL library usage that doesn't implement correct data reading with interrupts (it doesn't disable SPI in time, that causes dummy reads).

SPI loopback test (4 wire SPI mode)

This demo sends and receives data with SPI loopback. After data transmission it checks that sent and received data is the same. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 562500 success success success
2 multiple word write/read 1000000 562500 success success success
3 multiple word write/read async 1000000 562500 success success success
4 multiple word write/read with default fill 1000000 562500 success success success
5 single word write/read 200000 281250 success success success
6 multiple word write/read 200000 281250 success success success
7 multiple word write/read async 200000 281250 success success success
8 multiple word write/read with default fill 200000 281250 success success success
9 single word write/read 10000000 9000000 success success success
10 multiple word write/read 10000000 9000000 success success success
11 multiple word write/read async 10000000 9000000 success success success
12 multiple word write/read with default fill 10000000 9000000 success success success

full logs: main_4wire_stm32f103c8_logs.txt

  • STM32F411CE
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 781250 success success success
2 multiple word write/read 1000000 781250 success success success
3 multiple word write/read async 1000000 781250 success success success
4 multiple word write/read with default fill 1000000 781250 success success success
5 single word write/read 200000 390625 success success success
6 multiple word write/read 200000 390625 success success success
7 multiple word write/read async 200000 390625 success success success
8 multiple word write/read with default fill 200000 390625 success success success
9 single word write/read 10000000 6250000 success success success
10 multiple word write/read 10000000 6250000 success success success
11 multiple word write/read async 10000000 6250000 success success success
12 multiple word write/read with default fill 10000000 6250000 success success success

full logs: main_4wire_stm32f411ce_logs.txt

  • STM32H743VI
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 625000 success success success
2 multiple word write/read 1000000 625000 success success success
3 multiple word write/read asprojectync 1000000 625000 success success success
4 multiple word write/read with default fill 1000000 625000 success success success
5 single word write/read 200000 156250 success success success
6 multiple word write/read 200000 156250 success success success
7 multiple word write/read async 200000 156250 success success success
8 multiple word write/read with default fill 200000 156250 success success success
9 single word write/read 10000000 5000000 success success success
10 multiple word write/read 10000000 5000000 success success success
11 multiple word write/read async 10000000 5000000 success success success
12 multiple word write/read with default fill 10000000 5000000 success success success

full logs: main_4wire_stm32h743vi_logs.txt


Reviewers


0xc0170
0xc0170

Impressive work!

Tested impressively 💯

pull request

0xc0170 merge to ARMmbed/mbed-os

0xc0170
0xc0170

STM32: fix SPI 16 bit mode

Summary of changes

The current low-level STM32 SPI API implementation (file stm_spi_api.c) doesn't processes SPI frames in 16 bit mode correctly. If we need to sent 2 bytes 0x11 0x22 in 16 bit mode, SPI device sends 4 bytes (extra 0x00 byte is added before each one) 0x00 0x11 0x00 0x22. This pull request fixes this behaviour to send correct data: 0x22 0x11

issue: #15113 related pull request: #15115

Impact of changes

Fix data frame format of SPI in 16 bit mode for all STM32 devices.

Migration actions required

Documentation

Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

SPI monitoring with logic analyzer

This demo program simply writes bytes to SPI device with loopback (MISO is connected to MOSI). It allows checking SPI frames with logic analyzer.

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission without fixes:

  • 3-wire mode, synchronous transmission

    no_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    no_fix_3wire_async

  • 4-wire mode, synchronous transmission:

    no_fix_4wire_sync

  • 4-wire mode, asynchronous transmission:

    no_fix_4wire_async

  • full results. Console logs: no_fix_serial_logs.txt, logical analyzer data (sigrok format): no_fix_data.zip

Although we transmit the same data, synchronous and asynchronous SPI API give different results (asynchronous API transmits data correctly).

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission after fixes:

  • 3-wire mode, synchronous transmission:

    with_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    with_fix_3wire_async

  • 4-wire mode, synchronous transmission:

with_fix_4wire_sync

All SPI APIs give the same result after fix.

SPI test with sensor BMX160 (3 wire SPI mode)

This demo writes data to BMX160 sensor, reads them back and compares sent and received bytes. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 562500 success success success success
2 sync burst_w8_r8 1000000 562500 success success success success
3 sync single_w16_r8 1000000 562500 success success success success
4 sync burst_w16_r8 1000000 562500 success success success success
5 sync single_w8_r16 1000000 562500 success success success success
6 sync burst_w8_r16 1000000 562500 success success success success
7 sync single_w8_r8 200000 281250 success success success success
8 sync burst_w8_r8 200000 281250 success success success success
9 sync single_w16_r8 200000 281250 success success success success
10 sync burst_w16_r8 200000 281250 success success success success
11 sync single_w8_r16 200000 281250 success success success success
12 sync burst_w8_r16 200000 281250 success success success success
13 sync single_w8_r8 10000000 9000000 success success success success
14 sync burst_w8_r8 10000000 9000000 success success success success
15 sync single_w16_r8 10000000 9000000 success success success success
16 sync burst_w16_r8 10000000 9000000 success success success success
17 sync single_w8_r16 10000000 9000000 success success success success
18 sync burst_w8_r16 10000000 9000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 562500 success error success error
20 async burst_w8_r8 1000000 562500 success error success error
21 async single_w16_r8 1000000 562500 success error success error
22 async burst_w16_r8 1000000 562500 success error success error
23 async single_w8_r16 1000000 562500 success error success error
24 async burst_w8_r16 1000000 562500 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 281250 success error success error
26 async burst_w8_r8 200000 281250 success error success error
27 async single_w16_r8 200000 281250 success error success error
28 async burst_w16_r8 200000 281250 success error success error
29 async single_w8_r16 200000 281250 success error success error
30 async burst_w8_r16 200000 281250 success error success error
31 async single_w8_r8 10000000 9000000 success error error error
32 async burst_w8_r8 10000000 9000000 success error error error
33 async single_w16_r8 10000000 9000000 success error error error
34 async burst_w16_r8 10000000 9000000 success error error error
35 async single_w8_r16 10000000 9000000 success error success error
36 async burst_w8_r16 10000000 9000000 success error error error

full logs: main_3wire_stm32f103c8_logs.txt

  • STM32F411CE
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 781250 success success success success
2 sync burst_w8_r8 1000000 781250 success success success success
3 sync single_w16_r8 1000000 781250 success success success success
4 sync burst_w16_r8 1000000 781250 success success success success
5 sync single_w8_r16 1000000 781250 success success success success
6 sync burst_w8_r16 1000000 781250 success success success success
7 sync single_w8_r8 200000 390625 success success success success
8 sync burst_w8_r8 200000 390625 success success success success
9 sync single_w16_r8 200000 390625 success success success success
10 sync burst_w16_r8 200000 390625 success success success success
11 sync single_w8_r16 200000 390625 success success success success
12 sync burst_w8_r16 200000 390625 success success success success
13 sync single_w8_r8 10000000 6250000 success success success success
14 sync burst_w8_r8 10000000 6250000 success success success success
15 sync single_w16_r8 10000000 6250000 success success success success
16 sync burst_w16_r8 10000000 6250000 success success success success
17 sync single_w8_r16 10000000 6250000 success success success success
18 sync burst_w8_r16 10000000 6250000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 781250 success error success error
20 async burst_w8_r8 1000000 781250 success error success error
21 async single_w16_r8 1000000 781250 success error success error
22 async burst_w16_r8 1000000 781250 success error success error
23 async single_w8_r16 1000000 781250 success error success error
24 async burst_w8_r16 1000000 781250 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 390625 success error success error
26 async burst_w8_r8 200000 390625 success error success error
27 async single_w16_r8 200000 390625 success error success error
28 async burst_w16_r8 200000 390625 success error success error
29 async single_w8_r16 200000 390625 success error success error
30 async burst_w8_r16 200000 390625 success error success error
31 async single_w8_r8 10000000 6250000 success error success error
32 async burst_w8_r8 10000000 6250000 success error error error
33 async single_w16_r8 10000000 6250000 success error error error
34 async burst_w16_r8 10000000 6250000 success error error error
35 async single_w8_r16 10000000 6250000 success error success error
36 async burst_w8_r16 10000000 6250000 success error success error

full logs: main_3wire_stm32f411ce_logs.txt

  • STM32H743VI
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 625000 success success success success
2 sync burst_w8_r8 1000000 625000 success success success success
3 sync single_w16_r8 1000000 625000 success success success success
4 sync burst_w16_r8 1000000 625000 success success success success
5 sync single_w8_r16 1000000 625000 success success success success
6 sync burst_w8_r16 1000000 625000 success success success success
7 sync single_w8_r8 200000 156250 success success success success
8 sync burst_w8_r8 200000 156250 success success success success
9 sync single_w16_r8 200000 156250 success success success success
10 sync burst_w16_r8 200000 156250 success success success success
11 sync single_w8_r16 200000 156250 success success success success
12 sync burst_w8_r16 200000 156250 success success success success
13 sync single_w8_r8 10000000 5000000 success success success success
14 sync burst_w8_r8 10000000 5000000 success success success success
15 sync single_w16_r8 10000000 5000000 success success success success
16 sync burst_w16_r8 10000000 5000000 success success success success
17 sync single_w8_r16 10000000 5000000 success success success success
18 sync burst_w8_r16 10000000 5000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 625000 success success success success
20 async burst_w8_r8 1000000 625000 success success success success
21 async single_w16_r8 1000000 625000 success success success success
22 async burst_w16_r8 1000000 625000 success success success success
23 async single_w8_r16 1000000 625000 success success success success
24 async burst_w8_r16 1000000 625000 success success success success
25 async (+ abort_all_transfers after) single_w8_r8 200000 156250 success success success success
26 async burst_w8_r8 200000 156250 success success success success
27 async single_w16_r8 200000 156250 success success success success
28 async burst_w16_r8 200000 156250 success success success success
29 async single_w8_r16 200000 156250 success success success success
30 async burst_w8_r16 200000 156250 success success success success
31 async single_w8_r8 10000000 5000000 success success success success
32 async burst_w8_r8 10000000 5000000 success success success success
33 async single_w16_r8 10000000 5000000 success success success success
34 async burst_w16_r8 10000000 5000000 success success success success
35 async single_w8_r16 10000000 5000000 success success success success
36 async burst_w8_r16 10000000 5000000 success success success success

full logs: main_3wire_stm32h743vi_logs.txt

Result notes:

  1. Result tables have the "case name" column with value <single|burst>_w<8|16>_r<8|16> that means:
    • single - test sends single SPI data frame to BMX160 and then receives single SPI data frame
    • burst - test sends multiple SPI data frames to BMX160 and then receives multiple SPI data frames
    • w<8|16> - test sends SPI data frames in 8/16 bit mode
    • r<8|16> - test receives SPI data frames in 8/16 bit mode
  2. Asynchronous API doesn't work correctly in SPI IP version 1 (STM32F103C8 and STM32F411CE) due HAL library usage that doesn't implement correct data reading with interrupts (it doesn't disable SPI in time, that causes dummy reads).

SPI loopback test (4 wire SPI mode)

This demo sends and receives data with SPI loopback. After data transmission it checks that sent and received data is the same. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 562500 success success success
2 multiple word write/read 1000000 562500 success success success
3 multiple word write/read async 1000000 562500 success success success
4 multiple word write/read with default fill 1000000 562500 success success success
5 single word write/read 200000 281250 success success success
6 multiple word write/read 200000 281250 success success success
7 multiple word write/read async 200000 281250 success success success
8 multiple word write/read with default fill 200000 281250 success success success
9 single word write/read 10000000 9000000 success success success
10 multiple word write/read 10000000 9000000 success success success
11 multiple word write/read async 10000000 9000000 success success success
12 multiple word write/read with default fill 10000000 9000000 success success success

full logs: main_4wire_stm32f103c8_logs.txt

  • STM32F411CE
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 781250 success success success
2 multiple word write/read 1000000 781250 success success success
3 multiple word write/read async 1000000 781250 success success success
4 multiple word write/read with default fill 1000000 781250 success success success
5 single word write/read 200000 390625 success success success
6 multiple word write/read 200000 390625 success success success
7 multiple word write/read async 200000 390625 success success success
8 multiple word write/read with default fill 200000 390625 success success success
9 single word write/read 10000000 6250000 success success success
10 multiple word write/read 10000000 6250000 success success success
11 multiple word write/read async 10000000 6250000 success success success
12 multiple word write/read with default fill 10000000 6250000 success success success

full logs: main_4wire_stm32f411ce_logs.txt

  • STM32H743VI
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 625000 success success success
2 multiple word write/read 1000000 625000 success success success
3 multiple word write/read asprojectync 1000000 625000 success success success
4 multiple word write/read with default fill 1000000 625000 success success success
5 single word write/read 200000 156250 success success success
6 multiple word write/read 200000 156250 success success success
7 multiple word write/read async 200000 156250 success success success
8 multiple word write/read with default fill 200000 156250 success success success
9 single word write/read 10000000 5000000 success success success
10 multiple word write/read 10000000 5000000 success success success
11 multiple word write/read async 10000000 5000000 success success success
12 multiple word write/read with default fill 10000000 5000000 success success success

full logs: main_4wire_stm32h743vi_logs.txt


Reviewers


Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

Add USBDEVICE to NUCLEO_F722ZE target

USB was missing from NUCLEO_F722ZE but is present and working on the board.

Summary of changes

Impact of changes

Migration actions required

Documentation


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


pull request

0xc0170 merge to ARMmbed/mbed-os

0xc0170
0xc0170

Add USBDEVICE to NUCLEO_F722ZE target

USB was missing from NUCLEO_F722ZE but is present and working on the board.

Summary of changes

Impact of changes

Migration actions required

Documentation


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


push

0xc0170 push ARMmbed/mbed-os

0xc0170
0xc0170

Support for the NUCLEO_G0B1RE board

0xc0170
0xc0170

Merge pull request #15199 from majcher/feature/stm32g0b1

Support for the NUCLEO_G0B1RE board

commit sha: de5b459715dbbf3a5fe9b5a462647e5202d1065e

push time in 1 week ago
pull request

0xc0170 pull request ARMmbed/mbed-os

0xc0170
0xc0170

Support for the NUCLEO_G0B1RE board

Summary of changes

Support for the NUCLEO_G0B1RE board

Documentation

None


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

I need some help here.

mbed test -m NUCLEO_G0B1RE -t GCC_ARM

provides an info that the new target is not supported, but when I do the same changes with custom_targets.json it works fine for sample app.

[] No Tests required for this change (E.g docs only update)
[] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

Support for the NUCLEO_G0B1RE board

Summary of changes

Support for the NUCLEO_G0B1RE board

Documentation

None


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

I need some help here.

mbed test -m NUCLEO_G0B1RE -t GCC_ARM

provides an info that the new target is not supported, but when I do the same changes with custom_targets.json it works fine for sample app.

[] No Tests required for this change (E.g docs only update)
[] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

pull request

0xc0170 merge to ARMmbed/mbed-os

0xc0170
0xc0170

Support for the NUCLEO_G0B1RE board

Summary of changes

Support for the NUCLEO_G0B1RE board

Documentation

None


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

I need some help here.

mbed test -m NUCLEO_G0B1RE -t GCC_ARM

provides an info that the new target is not supported, but when I do the same changes with custom_targets.json it works fine for sample app.

[] No Tests required for this change (E.g docs only update)
[] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

STM32: fix SPI 16 bit mode

Summary of changes

The current low-level STM32 SPI API implementation (file stm_spi_api.c) doesn't processes SPI frames in 16 bit mode correctly. If we need to sent 2 bytes 0x11 0x22 in 16 bit mode, SPI device sends 4 bytes (extra 0x00 byte is added before each one) 0x00 0x11 0x00 0x22. This pull request fixes this behaviour to send correct data: 0x22 0x11

issue: #15113 related pull request: #15115

Impact of changes

Fix data frame format of SPI in 16 bit mode for all STM32 devices.

Migration actions required

Documentation

Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

SPI monitoring with logic analyzer

This demo program simply writes bytes to SPI device with loopback (MISO is connected to MOSI). It allows checking SPI frames with logic analyzer.

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission without fixes:

  • 3-wire mode, synchronous transmission

    no_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    no_fix_3wire_async

  • 4-wire mode, synchronous transmission:

    no_fix_4wire_sync

  • 4-wire mode, asynchronous transmission:

    no_fix_4wire_async

  • full results. Console logs: no_fix_serial_logs.txt, logical analyzer data (sigrok format): no_fix_data.zip

Although we transmit the same data, synchronous and asynchronous SPI API give different results (asynchronous API transmits data correctly).

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission after fixes:

  • 3-wire mode, synchronous transmission:

    with_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    with_fix_3wire_async

  • 4-wire mode, synchronous transmission:

with_fix_4wire_sync

All SPI APIs give the same result after fix.

SPI test with sensor BMX160 (3 wire SPI mode)

This demo writes data to BMX160 sensor, reads them back and compares sent and received bytes. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 562500 success success success success
2 sync burst_w8_r8 1000000 562500 success success success success
3 sync single_w16_r8 1000000 562500 success success success success
4 sync burst_w16_r8 1000000 562500 success success success success
5 sync single_w8_r16 1000000 562500 success success success success
6 sync burst_w8_r16 1000000 562500 success success success success
7 sync single_w8_r8 200000 281250 success success success success
8 sync burst_w8_r8 200000 281250 success success success success
9 sync single_w16_r8 200000 281250 success success success success
10 sync burst_w16_r8 200000 281250 success success success success
11 sync single_w8_r16 200000 281250 success success success success
12 sync burst_w8_r16 200000 281250 success success success success
13 sync single_w8_r8 10000000 9000000 success success success success
14 sync burst_w8_r8 10000000 9000000 success success success success
15 sync single_w16_r8 10000000 9000000 success success success success
16 sync burst_w16_r8 10000000 9000000 success success success success
17 sync single_w8_r16 10000000 9000000 success success success success
18 sync burst_w8_r16 10000000 9000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 562500 success error success error
20 async burst_w8_r8 1000000 562500 success error success error
21 async single_w16_r8 1000000 562500 success error success error
22 async burst_w16_r8 1000000 562500 success error success error
23 async single_w8_r16 1000000 562500 success error success error
24 async burst_w8_r16 1000000 562500 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 281250 success error success error
26 async burst_w8_r8 200000 281250 success error success error
27 async single_w16_r8 200000 281250 success error success error
28 async burst_w16_r8 200000 281250 success error success error
29 async single_w8_r16 200000 281250 success error success error
30 async burst_w8_r16 200000 281250 success error success error
31 async single_w8_r8 10000000 9000000 success error error error
32 async burst_w8_r8 10000000 9000000 success error error error
33 async single_w16_r8 10000000 9000000 success error error error
34 async burst_w16_r8 10000000 9000000 success error error error
35 async single_w8_r16 10000000 9000000 success error success error
36 async burst_w8_r16 10000000 9000000 success error error error

full logs: main_3wire_stm32f103c8_logs.txt

  • STM32F411CE
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 781250 success success success success
2 sync burst_w8_r8 1000000 781250 success success success success
3 sync single_w16_r8 1000000 781250 success success success success
4 sync burst_w16_r8 1000000 781250 success success success success
5 sync single_w8_r16 1000000 781250 success success success success
6 sync burst_w8_r16 1000000 781250 success success success success
7 sync single_w8_r8 200000 390625 success success success success
8 sync burst_w8_r8 200000 390625 success success success success
9 sync single_w16_r8 200000 390625 success success success success
10 sync burst_w16_r8 200000 390625 success success success success
11 sync single_w8_r16 200000 390625 success success success success
12 sync burst_w8_r16 200000 390625 success success success success
13 sync single_w8_r8 10000000 6250000 success success success success
14 sync burst_w8_r8 10000000 6250000 success success success success
15 sync single_w16_r8 10000000 6250000 success success success success
16 sync burst_w16_r8 10000000 6250000 success success success success
17 sync single_w8_r16 10000000 6250000 success success success success
18 sync burst_w8_r16 10000000 6250000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 781250 success error success error
20 async burst_w8_r8 1000000 781250 success error success error
21 async single_w16_r8 1000000 781250 success error success error
22 async burst_w16_r8 1000000 781250 success error success error
23 async single_w8_r16 1000000 781250 success error success error
24 async burst_w8_r16 1000000 781250 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 390625 success error success error
26 async burst_w8_r8 200000 390625 success error success error
27 async single_w16_r8 200000 390625 success error success error
28 async burst_w16_r8 200000 390625 success error success error
29 async single_w8_r16 200000 390625 success error success error
30 async burst_w8_r16 200000 390625 success error success error
31 async single_w8_r8 10000000 6250000 success error success error
32 async burst_w8_r8 10000000 6250000 success error error error
33 async single_w16_r8 10000000 6250000 success error error error
34 async burst_w16_r8 10000000 6250000 success error error error
35 async single_w8_r16 10000000 6250000 success error success error
36 async burst_w8_r16 10000000 6250000 success error success error

full logs: main_3wire_stm32f411ce_logs.txt

  • STM32H743VI
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 625000 success success success success
2 sync burst_w8_r8 1000000 625000 success success success success
3 sync single_w16_r8 1000000 625000 success success success success
4 sync burst_w16_r8 1000000 625000 success success success success
5 sync single_w8_r16 1000000 625000 success success success success
6 sync burst_w8_r16 1000000 625000 success success success success
7 sync single_w8_r8 200000 156250 success success success success
8 sync burst_w8_r8 200000 156250 success success success success
9 sync single_w16_r8 200000 156250 success success success success
10 sync burst_w16_r8 200000 156250 success success success success
11 sync single_w8_r16 200000 156250 success success success success
12 sync burst_w8_r16 200000 156250 success success success success
13 sync single_w8_r8 10000000 5000000 success success success success
14 sync burst_w8_r8 10000000 5000000 success success success success
15 sync single_w16_r8 10000000 5000000 success success success success
16 sync burst_w16_r8 10000000 5000000 success success success success
17 sync single_w8_r16 10000000 5000000 success success success success
18 sync burst_w8_r16 10000000 5000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 625000 success success success success
20 async burst_w8_r8 1000000 625000 success success success success
21 async single_w16_r8 1000000 625000 success success success success
22 async burst_w16_r8 1000000 625000 success success success success
23 async single_w8_r16 1000000 625000 success success success success
24 async burst_w8_r16 1000000 625000 success success success success
25 async (+ abort_all_transfers after) single_w8_r8 200000 156250 success success success success
26 async burst_w8_r8 200000 156250 success success success success
27 async single_w16_r8 200000 156250 success success success success
28 async burst_w16_r8 200000 156250 success success success success
29 async single_w8_r16 200000 156250 success success success success
30 async burst_w8_r16 200000 156250 success success success success
31 async single_w8_r8 10000000 5000000 success success success success
32 async burst_w8_r8 10000000 5000000 success success success success
33 async single_w16_r8 10000000 5000000 success success success success
34 async burst_w16_r8 10000000 5000000 success success success success
35 async single_w8_r16 10000000 5000000 success success success success
36 async burst_w8_r16 10000000 5000000 success success success success

full logs: main_3wire_stm32h743vi_logs.txt

Result notes:

  1. Result tables have the "case name" column with value <single|burst>_w<8|16>_r<8|16> that means:
    • single - test sends single SPI data frame to BMX160 and then receives single SPI data frame
    • burst - test sends multiple SPI data frames to BMX160 and then receives multiple SPI data frames
    • w<8|16> - test sends SPI data frames in 8/16 bit mode
    • r<8|16> - test receives SPI data frames in 8/16 bit mode
  2. Asynchronous API doesn't work correctly in SPI IP version 1 (STM32F103C8 and STM32F411CE) due HAL library usage that doesn't implement correct data reading with interrupts (it doesn't disable SPI in time, that causes dummy reads).

SPI loopback test (4 wire SPI mode)

This demo sends and receives data with SPI loopback. After data transmission it checks that sent and received data is the same. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 562500 success success success
2 multiple word write/read 1000000 562500 success success success
3 multiple word write/read async 1000000 562500 success success success
4 multiple word write/read with default fill 1000000 562500 success success success
5 single word write/read 200000 281250 success success success
6 multiple word write/read 200000 281250 success success success
7 multiple word write/read async 200000 281250 success success success
8 multiple word write/read with default fill 200000 281250 success success success
9 single word write/read 10000000 9000000 success success success
10 multiple word write/read 10000000 9000000 success success success
11 multiple word write/read async 10000000 9000000 success success success
12 multiple word write/read with default fill 10000000 9000000 success success success

full logs: main_4wire_stm32f103c8_logs.txt

  • STM32F411CE
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 781250 success success success
2 multiple word write/read 1000000 781250 success success success
3 multiple word write/read async 1000000 781250 success success success
4 multiple word write/read with default fill 1000000 781250 success success success
5 single word write/read 200000 390625 success success success
6 multiple word write/read 200000 390625 success success success
7 multiple word write/read async 200000 390625 success success success
8 multiple word write/read with default fill 200000 390625 success success success
9 single word write/read 10000000 6250000 success success success
10 multiple word write/read 10000000 6250000 success success success
11 multiple word write/read async 10000000 6250000 success success success
12 multiple word write/read with default fill 10000000 6250000 success success success

full logs: main_4wire_stm32f411ce_logs.txt

  • STM32H743VI
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 625000 success success success
2 multiple word write/read 1000000 625000 success success success
3 multiple word write/read asprojectync 1000000 625000 success success success
4 multiple word write/read with default fill 1000000 625000 success success success
5 single word write/read 200000 156250 success success success
6 multiple word write/read 200000 156250 success success success
7 multiple word write/read async 200000 156250 success success success
8 multiple word write/read with default fill 200000 156250 success success success
9 single word write/read 10000000 5000000 success success success
10 multiple word write/read 10000000 5000000 success success success
11 multiple word write/read async 10000000 5000000 success success success
12 multiple word write/read with default fill 10000000 5000000 success success success

full logs: main_4wire_stm32h743vi_logs.txt


Reviewers


0xc0170
0xc0170

Asynchronous API doesn't work correctly in SPI IP version 1 (STM32F103C8 and STM32F411CE) due HAL library usage that doesn't implement correct data reading with interrupts (it doesn't disable SPI in time, that causes dummy reads).

Is this known issue or should be reported?

Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

STM32: fix SPI 16 bit mode

Summary of changes

The current low-level STM32 SPI API implementation (file stm_spi_api.c) doesn't processes SPI frames in 16 bit mode correctly. If we need to sent 2 bytes 0x11 0x22 in 16 bit mode, SPI device sends 4 bytes (extra 0x00 byte is added before each one) 0x00 0x11 0x00 0x22. This pull request fixes this behaviour to send correct data: 0x22 0x11

issue: #15113 related pull request: #15115

Impact of changes

Fix data frame format of SPI in 16 bit mode for all STM32 devices.

Migration actions required

Documentation

Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

SPI monitoring with logic analyzer

This demo program simply writes bytes to SPI device with loopback (MISO is connected to MOSI). It allows checking SPI frames with logic analyzer.

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission without fixes:

  • 3-wire mode, synchronous transmission

    no_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    no_fix_3wire_async

  • 4-wire mode, synchronous transmission:

    no_fix_4wire_sync

  • 4-wire mode, asynchronous transmission:

    no_fix_4wire_async

  • full results. Console logs: no_fix_serial_logs.txt, logical analyzer data (sigrok format): no_fix_data.zip

Although we transmit the same data, synchronous and asynchronous SPI API give different results (asynchronous API transmits data correctly).

Results of const uint16_t tx_data_16[2] = {0x1122, 0x3344}; data transmission after fixes:

  • 3-wire mode, synchronous transmission:

    with_fix_3wire_sync

  • 3-wire mode, asynchronous transmission:

    with_fix_3wire_async

  • 4-wire mode, synchronous transmission:

with_fix_4wire_sync

All SPI APIs give the same result after fix.

SPI test with sensor BMX160 (3 wire SPI mode)

This demo writes data to BMX160 sensor, reads them back and compares sent and received bytes. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 562500 success success success success
2 sync burst_w8_r8 1000000 562500 success success success success
3 sync single_w16_r8 1000000 562500 success success success success
4 sync burst_w16_r8 1000000 562500 success success success success
5 sync single_w8_r16 1000000 562500 success success success success
6 sync burst_w8_r16 1000000 562500 success success success success
7 sync single_w8_r8 200000 281250 success success success success
8 sync burst_w8_r8 200000 281250 success success success success
9 sync single_w16_r8 200000 281250 success success success success
10 sync burst_w16_r8 200000 281250 success success success success
11 sync single_w8_r16 200000 281250 success success success success
12 sync burst_w8_r16 200000 281250 success success success success
13 sync single_w8_r8 10000000 9000000 success success success success
14 sync burst_w8_r8 10000000 9000000 success success success success
15 sync single_w16_r8 10000000 9000000 success success success success
16 sync burst_w16_r8 10000000 9000000 success success success success
17 sync single_w8_r16 10000000 9000000 success success success success
18 sync burst_w8_r16 10000000 9000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 562500 success error success error
20 async burst_w8_r8 1000000 562500 success error success error
21 async single_w16_r8 1000000 562500 success error success error
22 async burst_w16_r8 1000000 562500 success error success error
23 async single_w8_r16 1000000 562500 success error success error
24 async burst_w8_r16 1000000 562500 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 281250 success error success error
26 async burst_w8_r8 200000 281250 success error success error
27 async single_w16_r8 200000 281250 success error success error
28 async burst_w16_r8 200000 281250 success error success error
29 async single_w8_r16 200000 281250 success error success error
30 async burst_w8_r16 200000 281250 success error success error
31 async single_w8_r8 10000000 9000000 success error error error
32 async burst_w8_r8 10000000 9000000 success error error error
33 async single_w16_r8 10000000 9000000 success error error error
34 async burst_w16_r8 10000000 9000000 success error error error
35 async single_w8_r16 10000000 9000000 success error success error
36 async burst_w8_r16 10000000 9000000 success error error error

full logs: main_3wire_stm32f103c8_logs.txt

  • STM32F411CE
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 781250 success success success success
2 sync burst_w8_r8 1000000 781250 success success success success
3 sync single_w16_r8 1000000 781250 success success success success
4 sync burst_w16_r8 1000000 781250 success success success success
5 sync single_w8_r16 1000000 781250 success success success success
6 sync burst_w8_r16 1000000 781250 success success success success
7 sync single_w8_r8 200000 390625 success success success success
8 sync burst_w8_r8 200000 390625 success success success success
9 sync single_w16_r8 200000 390625 success success success success
10 sync burst_w16_r8 200000 390625 success success success success
11 sync single_w8_r16 200000 390625 success success success success
12 sync burst_w8_r16 200000 390625 success success success success
13 sync single_w8_r8 10000000 6250000 success success success success
14 sync burst_w8_r8 10000000 6250000 success success success success
15 sync single_w16_r8 10000000 6250000 success success success success
16 sync burst_w16_r8 10000000 6250000 success success success success
17 sync single_w8_r16 10000000 6250000 success success success success
18 sync burst_w8_r16 10000000 6250000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 781250 success error success error
20 async burst_w8_r8 1000000 781250 success error success error
21 async single_w16_r8 1000000 781250 success error success error
22 async burst_w16_r8 1000000 781250 success error success error
23 async single_w8_r16 1000000 781250 success error success error
24 async burst_w8_r16 1000000 781250 success error success error
25 async (+ abort_all_transfers after) single_w8_r8 200000 390625 success error success error
26 async burst_w8_r8 200000 390625 success error success error
27 async single_w16_r8 200000 390625 success error success error
28 async burst_w16_r8 200000 390625 success error success error
29 async single_w8_r16 200000 390625 success error success error
30 async burst_w8_r16 200000 390625 success error success error
31 async single_w8_r8 10000000 6250000 success error success error
32 async burst_w8_r8 10000000 6250000 success error error error
33 async single_w16_r8 10000000 6250000 success error error error
34 async burst_w16_r8 10000000 6250000 success error error error
35 async single_w8_r16 10000000 6250000 success error success error
36 async burst_w8_r16 10000000 6250000 success error success error

full logs: main_3wire_stm32f411ce_logs.txt

  • STM32H743VI
api case name target freq (Hz) actual freq (Hz) init result data clock
1 sync single_w8_r8 1000000 625000 success success success success
2 sync burst_w8_r8 1000000 625000 success success success success
3 sync single_w16_r8 1000000 625000 success success success success
4 sync burst_w16_r8 1000000 625000 success success success success
5 sync single_w8_r16 1000000 625000 success success success success
6 sync burst_w8_r16 1000000 625000 success success success success
7 sync single_w8_r8 200000 156250 success success success success
8 sync burst_w8_r8 200000 156250 success success success success
9 sync single_w16_r8 200000 156250 success success success success
10 sync burst_w16_r8 200000 156250 success success success success
11 sync single_w8_r16 200000 156250 success success success success
12 sync burst_w8_r16 200000 156250 success success success success
13 sync single_w8_r8 10000000 5000000 success success success success
14 sync burst_w8_r8 10000000 5000000 success success success success
15 sync single_w16_r8 10000000 5000000 success success success success
16 sync burst_w16_r8 10000000 5000000 success success success success
17 sync single_w8_r16 10000000 5000000 success success success success
18 sync burst_w8_r16 10000000 5000000 success success success success
19 async (+ abort_all_transfers after) single_w8_r8 1000000 625000 success success success success
20 async burst_w8_r8 1000000 625000 success success success success
21 async single_w16_r8 1000000 625000 success success success success
22 async burst_w16_r8 1000000 625000 success success success success
23 async single_w8_r16 1000000 625000 success success success success
24 async burst_w8_r16 1000000 625000 success success success success
25 async (+ abort_all_transfers after) single_w8_r8 200000 156250 success success success success
26 async burst_w8_r8 200000 156250 success success success success
27 async single_w16_r8 200000 156250 success success success success
28 async burst_w16_r8 200000 156250 success success success success
29 async single_w8_r16 200000 156250 success success success success
30 async burst_w8_r16 200000 156250 success success success success
31 async single_w8_r8 10000000 5000000 success success success success
32 async burst_w8_r8 10000000 5000000 success success success success
33 async single_w16_r8 10000000 5000000 success success success success
34 async burst_w16_r8 10000000 5000000 success success success success
35 async single_w8_r16 10000000 5000000 success success success success
36 async burst_w8_r16 10000000 5000000 success success success success

full logs: main_3wire_stm32h743vi_logs.txt

Result notes:

  1. Result tables have the "case name" column with value <single|burst>_w<8|16>_r<8|16> that means:
    • single - test sends single SPI data frame to BMX160 and then receives single SPI data frame
    • burst - test sends multiple SPI data frames to BMX160 and then receives multiple SPI data frames
    • w<8|16> - test sends SPI data frames in 8/16 bit mode
    • r<8|16> - test receives SPI data frames in 8/16 bit mode
  2. Asynchronous API doesn't work correctly in SPI IP version 1 (STM32F103C8 and STM32F411CE) due HAL library usage that doesn't implement correct data reading with interrupts (it doesn't disable SPI in time, that causes dummy reads).

SPI loopback test (4 wire SPI mode)

This demo sends and receives data with SPI loopback. After data transmission it checks that sent and received data is the same. Additionally, it controls number of SPI clock cycles with STM32 timer ETR feature.

After data sending/receiving with different SPI modes (8/16 bit) and frequencies it prints summary table with test results.

Results:

  • STM32F103C8
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 562500 success success success
2 multiple word write/read 1000000 562500 success success success
3 multiple word write/read async 1000000 562500 success success success
4 multiple word write/read with default fill 1000000 562500 success success success
5 single word write/read 200000 281250 success success success
6 multiple word write/read 200000 281250 success success success
7 multiple word write/read async 200000 281250 success success success
8 multiple word write/read with default fill 200000 281250 success success success
9 single word write/read 10000000 9000000 success success success
10 multiple word write/read 10000000 9000000 success success success
11 multiple word write/read async 10000000 9000000 success success success
12 multiple word write/read with default fill 10000000 9000000 success success success

full logs: main_4wire_stm32f103c8_logs.txt

  • STM32F411CE
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 781250 success success success
2 multiple word write/read 1000000 781250 success success success
3 multiple word write/read async 1000000 781250 success success success
4 multiple word write/read with default fill 1000000 781250 success success success
5 single word write/read 200000 390625 success success success
6 multiple word write/read 200000 390625 success success success
7 multiple word write/read async 200000 390625 success success success
8 multiple word write/read with default fill 200000 390625 success success success
9 single word write/read 10000000 6250000 success success success
10 multiple word write/read 10000000 6250000 success success success
11 multiple word write/read async 10000000 6250000 success success success
12 multiple word write/read with default fill 10000000 6250000 success success success

full logs: main_4wire_stm32f411ce_logs.txt

  • STM32H743VI
case name target freq (Hz) actual freq (Hz) result data clock
1 single word write/read 1000000 625000 success success success
2 multiple word write/read 1000000 625000 success success success
3 multiple word write/read asprojectync 1000000 625000 success success success
4 multiple word write/read with default fill 1000000 625000 success success success
5 single word write/read 200000 156250 success success success
6 multiple word write/read 200000 156250 success success success
7 multiple word write/read async 200000 156250 success success success
8 multiple word write/read with default fill 200000 156250 success success success
9 single word write/read 10000000 5000000 success success success
10 multiple word write/read 10000000 5000000 success success success
11 multiple word write/read async 10000000 5000000 success success success
12 multiple word write/read with default fill 10000000 5000000 success success success

full logs: main_4wire_stm32h743vi_logs.txt


Reviewers


0xc0170
0xc0170

related pull request: #15115

We can close #15115 if this is accepted?

cc @JojoS62

Jan
14
1 week ago
pull request

0xc0170 merge to ARMmbed/mbed-os

0xc0170
0xc0170

Support for the NUCLEO_G0B1RE board

Summary of changes

Support for the NUCLEO_G0B1RE board

Documentation

None


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

I need some help here.

mbed test -m NUCLEO_G0B1RE -t GCC_ARM

provides an info that the new target is not supported, but when I do the same changes with custom_targets.json it works fine for sample app.

[] No Tests required for this change (E.g docs only update)
[] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

Support for the NUCLEO_G0B1RE board

Summary of changes

Support for the NUCLEO_G0B1RE board

Documentation

None


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

I need some help here.

mbed test -m NUCLEO_G0B1RE -t GCC_ARM

provides an info that the new target is not supported, but when I do the same changes with custom_targets.json it works fine for sample app.

[] No Tests required for this change (E.g docs only update)
[] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

0xc0170
0xc0170

Awesome ! #15204 was merged, please rebase and we start CI soon.

Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

Add USBDEVICE to NUCLEO_F722ZE target

USB was missing from NUCLEO_F722ZE but is present and working on the board.

Summary of changes

Impact of changes

Migration actions required

Documentation


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


0xc0170
0xc0170

Was this tested with some examples/ run tests?

push

0xc0170 push ARMmbed/mbed-os

0xc0170
0xc0170

STM32G0 FLASH : support MCU with dual bank

0xc0170
0xc0170

Merge pull request #15204 from jeromecoutant/PR_G0_DUALBANK

STM32G0 FLASH : support MCU with dual bank

commit sha: c02e10bcdc39e4d0b6eaa68508340d81b88981ba

push time in 1 week ago
pull request

0xc0170 pull request ARMmbed/mbed-os

0xc0170
0xc0170

STM32G0 FLASH : support MCU with dual bank

Summary of changes

Latest STM32G0 MCU have dual bank feature

Which needs an update in the FLASH support implementation

Needed for #15199 @majcher

Impact of changes

Migration actions required

Documentation


Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

Tested with NUCLEO_G071RB and NUCLEO_G0B1RE

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers


Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

Where can I get the spi flash support list of mbed OS?

Description of defect

I am working with the latest arduino mbed os with my arduino nano 33 ble board. And I want to make my board work with a external spi flash. I am wondering if there is a support list of spi flash for mbed os?

Target(s) affected by this defect ?

arduino nano 33 ble

Toolchain(s) (name and version) displaying this defect ?

I use the arm-none-eabi-gcc in version 10.3. I download it from here

What version of Mbed-os are you using (tag or sha) ?

I use the arduino mbed os with latest commit hash:8ccd98f8d597f315f33fbe943f5a8c5f8d0e28d1

What version(s) of tools are you using. List all that apply (E.g. mbed-cli)

I use the mbed-cli and it's version is 1.10.5 I install the compile toolchains by following this page

How is this defect reproduced ?

I have tried the P25Q16H. 1 make mbed os's qspi can work 2 connec the P25Q16H to the nano 33 ble 3 run the following code to initialize the P25Q16H `#include "QSPIFBlockDevice.h" #include "mbed_trace.h"

#define TRACE_GROUP "main"

using namespace mbed;

QSPIFBlockDevice root(QSPI_FLASH1_IO0, QSPI_FLASH1_IO1, QSPI_FLASH1_IO2, QSPI_FLASH1_IO3, QSPI_FLASH1_SCK, QSPI_FLASH1_CSN, QSPIF_POLARITY_MODE_1, MBED_CONF_QSPIF_QSPI_FREQ);

void setup() {

Serial.begin(115200); while (!Serial);

mbed_trace_init();

tr_error("mbed trace test log"); Serial.println("init");

root.init(); }

void loop() {

} `

It can get the correct vender ID of P25Q16H. But I find something wrong with the mbed os log. The log shows "Device Does not Have a QE Bit, continue based on Read Inst", but I am sure the P25Q16H does have QE BIT.

0xc0170
0xc0170

You can take an inspiration from the test I shared. And just create your own driver for this flash, as you started. Find out where that warning is coming from and see if you can read/write data.

I haven't used qspi flash for some time so I can't help further here.

Jan
13
1 week ago
Activity icon
issue

0xc0170 issue comment ARMmbed/mbed-os

0xc0170
0xc0170

Where can I get the spi flash support list of mbed OS?

Description of defect

I am working with the latest arduino mbed os with my arduino nano 33 ble board. And I want to make my board work with a external spi flash. I am wondering if there is a support list of spi flash for mbed os?

Target(s) affected by this defect ?

arduino nano 33 ble

Toolchain(s) (name and version) displaying this defect ?

I use the arm-none-eabi-gcc in version 10.3. I download it from here

What version of Mbed-os are you using (tag or sha) ?

I use the arduino mbed os with latest commit hash:8ccd98f8d597f315f33fbe943f5a8c5f8d0e28d1

What version(s) of tools are you using. List all that apply (E.g. mbed-cli)

I use the mbed-cli and it's version is 1.10.5 I install the compile toolchains by following this page

How is this defect reproduced ?

I have tried the P25Q16H. 1 make mbed os's qspi can work 2 connec the P25Q16H to the nano 33 ble 3 run the following code to initialize the P25Q16H `#include "QSPIFBlockDevice.h" #include "mbed_trace.h"

#define TRACE_GROUP "main"

using namespace mbed;

QSPIFBlockDevice root(QSPI_FLASH1_IO0, QSPI_FLASH1_IO1, QSPI_FLASH1_IO2, QSPI_FLASH1_IO3, QSPI_FLASH1_SCK, QSPI_FLASH1_CSN, QSPIF_POLARITY_MODE_1, MBED_CONF_QSPIF_QSPI_FREQ);

void setup() {

Serial.begin(115200); while (!Serial);

mbed_trace_init();

tr_error("mbed trace test log"); Serial.println("init");

root.init(); }

void loop() {

} `

It can get the correct vender ID of P25Q16H. But I find something wrong with the mbed os log. The log shows "Device Does not Have a QE Bit, continue based on Read Inst", but I am sure the P25Q16H does have QE BIT.

0xc0170
0xc0170

I dont think there is official list (you can find some libraries on mbed.com portal) but you can find some tested here hal/tests/TESTS/mbed_hal/qspi/flash_configs

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