ccli8

ccli8

Member Since 6 years ago

Nuvoton, Taiwan

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173 contributions in the last year

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⚡ mbedls is a set of tools inherited from mbed-lmtools and used to detect mbed-enabled devices on the host (Windows, Linux and Mac OS)
⚡ Project generators for various embedded tools (IDE). IAR, uVision, Makefile, CoIDE, Eclipse and many more in the roadmap!
⚡ Definitions for the project generator: https://github.com/project-generator/project_generator
⚡ binary release of the uvisor - see https://github.com/ARMmbed/uvisor for more information
⚡ "Hello world!" example with uVisor enabled
⚡ mbed OS uVisor -- device security layer for ARMv7M microcontrollers
Activity
Jan
21
1 day ago
push

ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Based on alpha version BSP (85564a2716548e7b6d6a79a490c6d94a24cf9bcf)
  2. Continuing above, tweak BSP: (1) Add EPWM_ConfigOutputChannel2() to enable below 1Hz and below 1% duty cycle for PWM output (m460_epwm.h/c). (2) Add dummy RTC_WaitAccessEnable() for consistency with previous ports (m460_rtc.h).
  3. Target NuMaker-M467 board temporarily
  4. Support Arduino UNO form factor for NUMAKER_IOT_M467 target
  5. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: 4fb7175ac6af1bc0169071a323d0694e21076e97

push time in 1 day ago
push

ccli8 push ccli8/trusted-firmware-m

ccli8
ccli8

Crypto: Return correctly PSA_ERROR_INVALID_HANDLE

When the handle passed as input in a multipart operation is invalid, make sure to return the PSA_ERROR_INVALID_HANDLE error code.

Signed-off-by: Antonio de Angelis [email protected] Change-Id: I1cb70fc655d67b4aaf65fa8f5f47f0fd0a057e4c

ccli8
ccli8

platform: lairdconnectivity: Add platform GPIO and read service

Add lairdconnectivity platform services for GPIO and read as core platform services. The services are added in a way that makes it possible for out-of-tree boards to include these core services while still being able to add their own.

Change-Id: If3163c4810f6578ccf76e80f5a8f3b97a95dc591 Signed-off-by: Joakim Andersson [email protected]

ccli8
ccli8

SPM: Remove unused field in service_t struct

'handle_list' field in struct service_t is not used in SPM. 'list' field in struct tfm_conn_handle_t is not used. This patch is to remove these fields. Remove outdated tfm_partition_and_service_design_document.rst

Signed-off-by: Sherry Zhang [email protected] Change-Id: I55428f46b4dd0b13289e3f076e2ab4c8a4c53f77

ccli8
ccli8

SPM: AAPCS-specific operations

Particular AAPCS-related characteristics is necessary to achieve specific purposed functionality, gather these AAPCS-related operations into one place.

Check the comments in the file for detailed usage - The first functionality is for returning two 32-bit unsigned integers via the 'argument registers' to ease the assembly caller.

Change-Id: I87a36c5bfd33c42bbd4a511a8edca0a1051d870a Signed-off-by: Ken Liu [email protected]

ccli8
ccli8

Docs: Clean up build instructions

Primarily to reduce redundancy and improve clarity. Also fixed a few typos. In the "example builds" section, introduced the build command with just the mandatory parameters at first and then introduced the important optional parameters.

Signed-off-by: Chris Brand [email protected] Change-Id: Ib4d74c3abcc850c836480dfb1962af30625c3a77

ccli8
ccli8

Crypto: Upgrade Mbed TLS to v3.1.0

Update TF-M to migrate to Mbed TLS v3.1.0. And cherry-picks from the feature-cc-psa-crypto-drivers branch the following patches:

  • [2a233b8] CC312: Access curve info members w/o private suffixes
  • [330b0ba] CC312: Stub multipart CCM APIs

Change-Id: I850cc171fd8c8857150cfef0f2366a4564b27959 Signed-off-by: Summer Qin [email protected] Signed-off-by: Abbas Bracken Ziad [email protected] Signed-off-by: Antonio de Angelis [email protected]

ccli8
ccli8

Crypto: Cover corner case for BAD_STATE error return

When starting a multipart operation using an handle for a valid operation already in progress and not yet completed, make sure to return BAD_STATE instead INVALID_HANDLE.

Signed-off-by: Antonio de Angelis [email protected] Change-Id: I8c2598a6646fb3f7cf1ccd45b7b3fe0132f77721

ccli8
ccli8

Docs: Add tool dependency for Musca test chip boards

SRecord is needed to install to execute example tests on Musca test chip boards.

Change-Id: I7ebf175c1192b60509f1d3cd0a9e58d17f7c6567 Signed-off-by: Summer Qin [email protected]

ccli8
ccli8

Platform: PSoC64: Check out PDL library at build time

Rather than including a copy of the PDL source in TF-M, check it out at build time, as is already done with other libraries.

Change-Id: Ic3cf1b1802b075ccba621a315f899361e2c8951f Signed-off-by: Chris Brand [email protected]

ccli8
ccli8

Platform: PSoC64: CMakefile tweak

Use ${PLATFORM_DIR} in preference to ${CMAKE_SOURCE_DIR}/platform

Signed-off-by: Chris Brand [email protected] Change-Id: I39d6ac6cc25e9d72a1a675a883a18b3a396fc383

ccli8
ccli8

Platform: PSoC64: Tweak *.cmake

Move everything that isn't related to the different S and NS CPU into config.cmake.

Change-Id: Ie3b552a4513ba9a6a76902a1eade053750ed88b0 Signed-off-by: Chris Brand [email protected]

ccli8
ccli8

Hotfix: Fix Profile Small build failure

It causes bl2 to link TF-M Crypto service when platform_bl2 links tfm_fih on AN521. It eventually triggers duplicated definitions of Mbed TLS symbols between bl2 mbedcrypto build and Crypto service mbedcrypto build.

Remove tfm_fih link from platform_bl2 on AN521 as TF-M FIH definitions can be different from those in BL2 FIH library. It stops BL2 to link TF-M service partitions. A more comprehensive alternative can define a dedicate FIH interface library for other targets to get include.

Also clean up other unnecessary links in bl2 target.

Change-Id: Ifd03e146b7ae3350d233588d2c2c0ae5d62bb654 Signed-off-by: David Hu [email protected]

ccli8
ccli8

SPM: Remove LOADADDR of TFM_SP_META_PTR in GNUARM

The load address and relocation address is same for TFM_SP_META_PTR. No need to use LOADADDR for it. Otherwise, will cause zero table operation failed when set TFM_SP_META_PTR_ENABLE ON.

Signed-off-by: Summer Qin [email protected] Change-Id: Idcf7c196d8b0330a069053c1914b316e6b4e631d

ccli8
ccli8

corstone1000: fix uefi capsule version check

uefi capsule adds fmp_payload_header if capsule is generated using GenerateCapsule edk-2 prebuilt binary. Version check code read the fw_version from this header and compare it with previous version.

This change is to compare the version from fmp_payload_header instead of fmp_capsule_header.

Signed-off-by: Vishnu Banavath [email protected] Change-Id: I8c7cbd9854f3d0a97146506cc4dbfb293fb32e87

ccli8
ccli8

doc: ps: Small language corrections

The first paragraph first states that hardware isolation backs the service and then states what happens when hardware isolation is not present. This is contradictory.

Several paragraphs use language that imply that PS is always used for external flash when in reality it could be used for internal or external flash.

The asset size limitation is repeated unnecessarily.

Change-Id: I7853a9e691b37575be59c826bb6029327b43c188 Signed-off-by: Sebastian Bøe [email protected]

ccli8
ccli8

Add SLIH to ns_agent_mailbox

Add ns_agent_mailbox.c with code for the new partition. In there, boot the NS core, initialise the mailbox, and then enter a while loop waiting for the new (interrupt) signal. Also in this file is the required SLIH initialisation function. Move the secure mailbox into the new partition. Modify the platform-specific interrupt handler to add the required SLIH functionality. Add the SLIH interrupt init function. Modify the yaml file for the partition to remove the dummy service, switch to the new partition entry point, add dependencies, and to add the actual IRQ. Add a #define for the MAILBOX_IRQ to region_defs.h for the three platforms that support dual-core. Add idle_partition to multi-core builds. Call to process mailbox directly from ns_agent_mailbox partition, rather than triggering a PendSV. Remove corresponding mailbox polling from do_schedule(). Remove multi-core-specific code from tfm_spm_is_ns_caller() and tfm_spm_get_caller_privilege_mode().

Change-Id: Ia94813ba95e08bf5d4684dde17832a5de8bc9d45 Signed-off-by: Chris Brand [email protected]

ccli8
ccli8

Docs: Fix Armclang toolchain descriptions

  • Fix Armclang PATH setting
  • Specify valid Armclang versions. It is found Armclang v6.15 and v6.16 may also cause MemManage Fault as v6.17 does.

Change-Id: Id5a591a8d165c78adf5fd9346c962662f151d496 Signed-off-by: David Hu [email protected]

ccli8
ccli8

Build: Enhance toolchain version check

Move toolchain version checks from check_config.cmake to dedicated toolchain_XXX.cmake. Those checks are created specially for toolchain limitations. They shall not be placed in TF-M functionality configuration checks.

Make the valid version range more clear in toolchain_XXX.cmake.

Change-Id: I79fc1a7ae18dce6ffc98408c16ed7e3863bf0b9d Signed-off-by: David Hu [email protected]

ccli8
ccli8

Build: Change test code inclusion cmake

To move runtime tests into the /runtime dir

Change-Id: I53e7ea93104e4360842fdd9b71a1e43ee1cea1c6 Signed-off-by: Raef Coles [email protected]

ccli8
ccli8

BL2: Add BL2 test code

Change-Id: I96f781b5de80e4a20121c596b1790259e98173f3 Signed-off-by: Raef Coles [email protected]

commit sha: 7156793f2ee22075fb206116df346e014506dd06

push time in 1 day ago
push

ccli8 push ccli8/trusted-firmware-m

ccli8
ccli8

Crypto: Return correctly PSA_ERROR_INVALID_HANDLE

When the handle passed as input in a multipart operation is invalid, make sure to return the PSA_ERROR_INVALID_HANDLE error code.

Signed-off-by: Antonio de Angelis [email protected] Change-Id: I1cb70fc655d67b4aaf65fa8f5f47f0fd0a057e4c

ccli8
ccli8

platform: lairdconnectivity: Add platform GPIO and read service

Add lairdconnectivity platform services for GPIO and read as core platform services. The services are added in a way that makes it possible for out-of-tree boards to include these core services while still being able to add their own.

Change-Id: If3163c4810f6578ccf76e80f5a8f3b97a95dc591 Signed-off-by: Joakim Andersson [email protected]

ccli8
ccli8

SPM: Remove unused field in service_t struct

'handle_list' field in struct service_t is not used in SPM. 'list' field in struct tfm_conn_handle_t is not used. This patch is to remove these fields. Remove outdated tfm_partition_and_service_design_document.rst

Signed-off-by: Sherry Zhang [email protected] Change-Id: I55428f46b4dd0b13289e3f076e2ab4c8a4c53f77

ccli8
ccli8

SPM: AAPCS-specific operations

Particular AAPCS-related characteristics is necessary to achieve specific purposed functionality, gather these AAPCS-related operations into one place.

Check the comments in the file for detailed usage - The first functionality is for returning two 32-bit unsigned integers via the 'argument registers' to ease the assembly caller.

Change-Id: I87a36c5bfd33c42bbd4a511a8edca0a1051d870a Signed-off-by: Ken Liu [email protected]

ccli8
ccli8

Docs: Clean up build instructions

Primarily to reduce redundancy and improve clarity. Also fixed a few typos. In the "example builds" section, introduced the build command with just the mandatory parameters at first and then introduced the important optional parameters.

Signed-off-by: Chris Brand [email protected] Change-Id: Ib4d74c3abcc850c836480dfb1962af30625c3a77

ccli8
ccli8

Crypto: Upgrade Mbed TLS to v3.1.0

Update TF-M to migrate to Mbed TLS v3.1.0. And cherry-picks from the feature-cc-psa-crypto-drivers branch the following patches:

  • [2a233b8] CC312: Access curve info members w/o private suffixes
  • [330b0ba] CC312: Stub multipart CCM APIs

Change-Id: I850cc171fd8c8857150cfef0f2366a4564b27959 Signed-off-by: Summer Qin [email protected] Signed-off-by: Abbas Bracken Ziad [email protected] Signed-off-by: Antonio de Angelis [email protected]

ccli8
ccli8

Crypto: Cover corner case for BAD_STATE error return

When starting a multipart operation using an handle for a valid operation already in progress and not yet completed, make sure to return BAD_STATE instead INVALID_HANDLE.

Signed-off-by: Antonio de Angelis [email protected] Change-Id: I8c2598a6646fb3f7cf1ccd45b7b3fe0132f77721

ccli8
ccli8

Docs: Add tool dependency for Musca test chip boards

SRecord is needed to install to execute example tests on Musca test chip boards.

Change-Id: I7ebf175c1192b60509f1d3cd0a9e58d17f7c6567 Signed-off-by: Summer Qin [email protected]

ccli8
ccli8

Platform: PSoC64: Check out PDL library at build time

Rather than including a copy of the PDL source in TF-M, check it out at build time, as is already done with other libraries.

Change-Id: Ic3cf1b1802b075ccba621a315f899361e2c8951f Signed-off-by: Chris Brand [email protected]

ccli8
ccli8

Platform: PSoC64: CMakefile tweak

Use ${PLATFORM_DIR} in preference to ${CMAKE_SOURCE_DIR}/platform

Signed-off-by: Chris Brand [email protected] Change-Id: I39d6ac6cc25e9d72a1a675a883a18b3a396fc383

ccli8
ccli8

Platform: PSoC64: Tweak *.cmake

Move everything that isn't related to the different S and NS CPU into config.cmake.

Change-Id: Ie3b552a4513ba9a6a76902a1eade053750ed88b0 Signed-off-by: Chris Brand [email protected]

ccli8
ccli8

Hotfix: Fix Profile Small build failure

It causes bl2 to link TF-M Crypto service when platform_bl2 links tfm_fih on AN521. It eventually triggers duplicated definitions of Mbed TLS symbols between bl2 mbedcrypto build and Crypto service mbedcrypto build.

Remove tfm_fih link from platform_bl2 on AN521 as TF-M FIH definitions can be different from those in BL2 FIH library. It stops BL2 to link TF-M service partitions. A more comprehensive alternative can define a dedicate FIH interface library for other targets to get include.

Also clean up other unnecessary links in bl2 target.

Change-Id: Ifd03e146b7ae3350d233588d2c2c0ae5d62bb654 Signed-off-by: David Hu [email protected]

ccli8
ccli8

SPM: Remove LOADADDR of TFM_SP_META_PTR in GNUARM

The load address and relocation address is same for TFM_SP_META_PTR. No need to use LOADADDR for it. Otherwise, will cause zero table operation failed when set TFM_SP_META_PTR_ENABLE ON.

Signed-off-by: Summer Qin [email protected] Change-Id: Idcf7c196d8b0330a069053c1914b316e6b4e631d

ccli8
ccli8

corstone1000: fix uefi capsule version check

uefi capsule adds fmp_payload_header if capsule is generated using GenerateCapsule edk-2 prebuilt binary. Version check code read the fw_version from this header and compare it with previous version.

This change is to compare the version from fmp_payload_header instead of fmp_capsule_header.

Signed-off-by: Vishnu Banavath [email protected] Change-Id: I8c7cbd9854f3d0a97146506cc4dbfb293fb32e87

ccli8
ccli8

doc: ps: Small language corrections

The first paragraph first states that hardware isolation backs the service and then states what happens when hardware isolation is not present. This is contradictory.

Several paragraphs use language that imply that PS is always used for external flash when in reality it could be used for internal or external flash.

The asset size limitation is repeated unnecessarily.

Change-Id: I7853a9e691b37575be59c826bb6029327b43c188 Signed-off-by: Sebastian Bøe [email protected]

ccli8
ccli8

Add SLIH to ns_agent_mailbox

Add ns_agent_mailbox.c with code for the new partition. In there, boot the NS core, initialise the mailbox, and then enter a while loop waiting for the new (interrupt) signal. Also in this file is the required SLIH initialisation function. Move the secure mailbox into the new partition. Modify the platform-specific interrupt handler to add the required SLIH functionality. Add the SLIH interrupt init function. Modify the yaml file for the partition to remove the dummy service, switch to the new partition entry point, add dependencies, and to add the actual IRQ. Add a #define for the MAILBOX_IRQ to region_defs.h for the three platforms that support dual-core. Add idle_partition to multi-core builds. Call to process mailbox directly from ns_agent_mailbox partition, rather than triggering a PendSV. Remove corresponding mailbox polling from do_schedule(). Remove multi-core-specific code from tfm_spm_is_ns_caller() and tfm_spm_get_caller_privilege_mode().

Change-Id: Ia94813ba95e08bf5d4684dde17832a5de8bc9d45 Signed-off-by: Chris Brand [email protected]

ccli8
ccli8

Docs: Fix Armclang toolchain descriptions

  • Fix Armclang PATH setting
  • Specify valid Armclang versions. It is found Armclang v6.15 and v6.16 may also cause MemManage Fault as v6.17 does.

Change-Id: Id5a591a8d165c78adf5fd9346c962662f151d496 Signed-off-by: David Hu [email protected]

ccli8
ccli8

Build: Enhance toolchain version check

Move toolchain version checks from check_config.cmake to dedicated toolchain_XXX.cmake. Those checks are created specially for toolchain limitations. They shall not be placed in TF-M functionality configuration checks.

Make the valid version range more clear in toolchain_XXX.cmake.

Change-Id: I79fc1a7ae18dce6ffc98408c16ed7e3863bf0b9d Signed-off-by: David Hu [email protected]

ccli8
ccli8

Build: Change test code inclusion cmake

To move runtime tests into the /runtime dir

Change-Id: I53e7ea93104e4360842fdd9b71a1e43ee1cea1c6 Signed-off-by: Raef Coles [email protected]

ccli8
ccli8

BL2: Add BL2 test code

Change-Id: I96f781b5de80e4a20121c596b1790259e98173f3 Signed-off-by: Raef Coles [email protected]

commit sha: 77b3e54abcfdfbbe352892d9d078bc2736ac15b8

push time in 1 day ago
Jan
20
2 days ago
push

ccli8 push ccli8/ci-test-shield

ccli8
ccli8

Nuvoton: Patch for test on Nuvoton targets

  1. Patch ci_test_config.h to support both mbed-os 5/6.
  2. Enlarge stack size in TESTS/concurrent tests to avoid stack overflow.
  3. Remove DAC test. Most Nuvoton boards don't have compatible DAC pinout for test.
  4. Remove PWM_3 test for targets not having compatible pinout for test. NOTE: Below list target pintout not align with Arduino UNO PWM according to mbed-os's pin_names/arduino_uno test: NUMAKER_PFM_NANO130 : D10 D11 NUMAKER_PFM_NUC472 : D9 D10 D11 NUMAKER_PFM_M453 : None NUMAKER_IOT_M467 : None NUMAKER_PFM_M487 : None NUMAKER_IOT_M487 : None NUMAKER_IOT_M252 : None NUMAKER_IOT_M263A : None NU_M2351* : D10 D11 NU_M2354* : None
  5. Remove ADC test from NUMAKER_IOT_M487 because its A2/A3 are shared with ESP8266 RTS/CTS.
  6. Add convenience test scripts for different targets
  7. Add .mbedignore files to decrease compile time

commit sha: b7e97074aad95a427ecf5bc8195021c87a53abe5

push time in 2 days ago
push

ccli8 push ccli8/nu-greentea

ccli8
ccli8

Fix mbedtls tests missing

ccli8
ccli8

Remove unnecessary mbed_app_pin-name.json for pin name test

ccli8
ccli8

Add pin name test into whole test

ccli8
ccli8

Fix ARDUINO/ARDUINO_UNO compliance configuration for NUMAKER_IOT_M467

To run FPGA CI Test Shield test, either ARDUINO or ARDUINO_UNO must specify in the form factor support list (target.supported_form_factors).

ARDUINO is specified by default. For targets enabling ARDUINO_UNO below, ARDUINO_UNO must re-specify to override the default regardless of whether or not specified in targets.jsno:

  • NUMAKER_IOT_M467
  • NU_M22354

commit sha: d5bc39414f8200615ed46390d16a44efd92ef462

push time in 2 days ago
push

ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Based on alpha version BSP (85564a2716548e7b6d6a79a490c6d94a24cf9bcf)
  2. Continuing above, tweak BSP: (1) Add EPWM_ConfigOutputChannel2() to enable below 1Hz and below 1% duty cycle for PWM output (m460_epwm.h/c). (2) Add dummy RTC_WaitAccessEnable() for consistency with previous ports (m460_rtc.h).
  3. Target NuMaker-M467 board temporarily
  4. Support Arduino UNO form factor for NUMAKER_IOT_M467 target
  5. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: c0f7a3f115afdee481ff1327c3a30db05a78e1d2

push time in 2 days ago
Jan
19
3 days ago
push

ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Based on alpha version BSP (85564a2716548e7b6d6a79a490c6d94a24cf9bcf)
  2. Continuing above, tweak BSP: (1) Add EPWM_ConfigOutputChannel2() to enable below 1Hz and below 1% duty cycle for PWM output (m460_epwm.h/c). (2) Add dummy RTC_WaitAccessEnable() for consistency with previous ports (m460_rtc.h).
  3. Target NuMaker-M467 board temporarily
  4. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: 15871f94090c626edab1004845aec35500062deb

push time in 3 days ago
Activity icon
created branch

ccli8 in ccli8/mbed-os create branch nuvoton_m467_beta

createdAt 3 days ago
Activity icon
delete

ccli8 in ccli8/mbed-os delete branch nuvoton_m467

deleted time in 3 days ago
Jan
18
4 days ago
push

ccli8 push ccli8/mbed-os

ccli8
ccli8

Added M4KN Platform

New Platform M4KN for Toshiba has been added

ccli8
ccli8

Added SPDX Header

Updated PIN Names Added M4KN MCU Deatils in index.json Removed Special Chars

ccli8
ccli8

Updated code to remove float symbols

ccli8
ccli8

M487: Fix UART 6/7 base address encoding

Fix UART 6/7 base addresses are incorrectly encoded into peripheral names

ccli8
ccli8

Merge pull request #15200 from OpenNuvoton/nuvoton_m487_fix-uart67-base

M487: Fix UART 6/7 base address encoding

ccli8
ccli8

Merge pull request #15194 from deepak-shreshti/master

Add Toshiba M4KN Platform

ccli8
ccli8

STM32G0 FLASH : support MCU with dual bank

ccli8
ccli8

Add USBDEVICE to NUCLEO_F722ZE target

USB was missing from NUCLEO_F722ZE but is present and working on the board.

ccli8
ccli8

Merge pull request #15204 from jeromecoutant/PR_G0_DUALBANK

STM32G0 FLASH : support MCU with dual bank

ccli8
ccli8

Support for the NUCLEO_G0B1RE board

ccli8
ccli8

Fix STM32 SPI 16-bit logic

Update SPI logic to process 16 bit words in the same way by sync/async, 3/4 wires modes:

  • fix 3-wire synchronous transmission to move 2 or more bytes between buffer and SPI register per word tarnsmission
  • fix 4-wire synchronous transmission to move 2 or more bytes between buffer and SPI register per word tarnsmission
ccli8
ccli8

Fix STM32 SPI async API for STM32H7 (SPI_IP_VERSION_V2)

By default, HAL functions (HAL_SPI_TransmitReceive_IT/HAL_SPI_Transmit_IT/HAL_SPI_Receive_IT) assume that SPI is disabled between function invocation. It's needed to set transfer size (CR2 register), that can be modified only if SPI disabled. But stm32_spi_api.c keeps SPI enabled after initialization.

This commit adds helper code for STM32H7 (SPI_IP_VERSION_V2) that disables SPI before HAL_SPI_TransmitReceive_IT/HAL_SPI_Transmit_IT/HAL_SPI_Receive_IT and after end of transaction for HAL API compatibility.

ccli8
ccli8

Merge pull request #15199 from majcher/feature/stm32g0b1

Support for the NUCLEO_G0B1RE board

ccli8
ccli8

Merge pull request #15205 from mikrodust-henrikp/add_usbdevice_to_nucleo_f722ze

Add USBDEVICE to NUCLEO_F722ZE target

ccli8
ccli8

Merge pull request #15206 from vznncv/iss_stm32_spi_16_bit

STM32: fix SPI 16 bit mode

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Based on alpha version BSP (85564a2716548e7b6d6a79a490c6d94a24cf9bcf)
  2. Continuing above, tweak BSP: (1) Add EPWM_ConfigOutputChannel2() to enable below 1Hz and below 1% duty cycle for PWM output (m460_epwm.h/c). (2) Add dummy RTC_WaitAccessEnable() for consistency with previous ports (m460_rtc.h).
  3. Target NuMaker-M467 board temporarily
  4. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: fa07438772b3141300021a3ccb6291b378afc28a

push time in 4 days ago
Jan
17
5 days ago
push

ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Based on alpha version BSP (85564a2716548e7b6d6a79a490c6d94a24cf9bcf)
  2. Target NuMaker-M467 board temporarily
  3. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: 30977a7995a6ad09802d54607647be8f41d8e3e2

push time in 5 days ago
push

ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Based on alpha version BSP
  2. Target NuMaker-M467 board
  3. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: b05678afd3251ded0c06c6d498b478ff7cb8d54a

push time in 5 days ago
Jan
14
1 week ago
push

ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: 34f565245c64ca6cc4c57542515c9395cf39080e

push time in 1 week ago
push

ccli8 push OpenNuvoton/NuMaker-mbed-SNMP

ccli8
ccli8

Fix console input failure in cmake build

This is caused by pre-main files missing in cmake fiile.

commit sha: fec39f330f5ab79be2ccb5e164b57fd1fc0de4ed

push time in 1 week ago
Jan
13
1 week ago
push

ccli8 push OpenNuvoton/NuMaker-mbed-SNMP

ccli8
ccli8

Update cmake

Update with repository renaming to NuMaker-mbed-SNMP from NuMaker-mbed-lwIP-SNMP-Agent-example

commit sha: 1262bf20ed72e167ed5fe9033df0c92146b8cac8

push time in 1 week ago
push

ccli8 push OpenNuvoton/NuMaker-mbed-SNMP

ccli8
ccli8

Update readme

Fix with repository renaming to NuMaker-mbed-SNMP from NuMaker-mbed-lwIP-SNMP-Agent-example

commit sha: 2f04e36b633eefc019ef938eaf805746c62cc4ca

push time in 1 week ago
Activity icon
created branch
createdAt 1 week ago
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ccli8 push ccli8/mbed-mcuboot-demo

ccli8
ccli8

Support Nuvoton targets

  1. Adjust mbed_app.json (1) Work around MCUBOOT_HAVE_LOGGING missing in mbed port's mcuboot_config.h (2) Change log level to 'INFO'. (3) Change default UART baudrate to 115200 (4) Enlarge default boot stack size to fix boot stack overflow
  2. Support targets:
    • NUMAKER_IOT_M487
    • NUMAKER_IOT_M487_SMALLSLOT NOTE: Use NUMAKER_IOT_M487_SMALLSLOT for evaluation, whose flash layout is designed to accommodate update candidate placed in back of primary slot and can support update in-place with mbed-mcuboot-blinky.
  3. Add NUSD for candidate firmware storage (1) Configure NUSD as default block device (BlockDevice::get_default_instance()) (2) Use NuSDFlashSimBlockDevice instead of NuSDBlockDevice for MCUboot's flash map backend (get_secondary_bd) for the below requirements: 1) Actual erase to 0xFF 2) Larger erase unit than 512 to be consistent with internal flash's sector size 3) 1-byte/1-word read unit 4) 1-byte/1-word program unit
  4. Notes for MCUboot configuration (1) According to code fragment below, boot_slots_compatible() can fail because BOOT_MAX_IMG_SECTORS is based on internal flash sector, with which num_sectors_secondary, for external flash, is incompatible. To comply with it, mcuboot.max-img-sectors is derived from mcuboot.slot-size / sector size, which is the minimum of internal/external flash sector sizes. https://github.com/mcu-tools/mcuboot/blob/9eff1e08bd13ca9f0723f06aa7b386f09828956a/boot/bootutil/src/swap_scratch.c#L185-L189 NOTE: When external flash is backed by NUSD, NUSD is NuSDFlashSimBlockDevice which has adapted sector size other than 512. (2) According to code fragment below, mcuboot.scratch-size, though undocumented, must be larger than trailer size, which majorly depends on mcuboot.max-img-sectors. https://github.com/mcu-tools/mcuboot/blob/9eff1e08bd13ca9f0723f06aa7b386f09828956a/boot/bootutil/src/swap_scratch.c#L517-L520 https://github.com/mcu-tools/mcuboot/blob/9eff1e08bd13ca9f0723f06aa7b386f09828956a/boot/bootutil/src/swap_scratch.c#L452 (3) To enable rollback, it is safe to reserve trailer(+TLV) size: mcuboot.max-img-sectors x 12 + 2KiB

commit sha: 2c870c5d1dea43daccb3837bfc5f3175fd378cc3

push time in 1 week ago
push

ccli8 push ccli8/mbed-mcuboot-blinky

ccli8
ccli8

Support Nuvoton targets

  1. Adjust mbed_app.json (1) Work around MCUBOOT_HAVE_LOGGING missing in mbed port's mcuboot_config.h (2) Change log level to 'INFO'. (3) Change default UART baudrate to 115200
  2. Support targets:
    • NUMAKER_IOT_M487
    • NUMAKER_IOT_M487_SMALLSLOT NOTE: Use NUMAKER_IOT_M487_SMALLSLOT for evaluation, whose flash layout is designed to accommodate update candidate placed in back of primary slot and can support update in-place with mbed-mcuboot-blinky.
  3. Add NUSD for candidate firmware storage (1) Configure NUSD as default block device (BlockDevice::get_default_instance()) (2) Use NuSDFlashSimBlockDevice instead of NuSDBlockDevice for MCUboot's flash map backend (get_secondary_bd) for the below requirements: 1) Actual erase to 0xFF 2) Larger erase unit than 512 to be consistent with internal flash's sector size 3) 1-byte/1-word read unit 4) 1-byte/1-word program unit
  4. Embed update candidate through data array rather than reserved space. This is to make flash layout consistent among update test and normal use.
  5. Enable button's GPIO interrupt which is needed for Nuvoton targets to wake up from sleep.
  6. Notes for mbed_app.json: (1) MCUboot configuration must be consistent with mbed-mcuboot-demo. (2) KVStore, though unused, is configured to help demo flash layout.

commit sha: 430341d4266a38c99eaa7d3e1db43562918c428a

push time in 1 week ago
Jan
12
1 week ago
push

ccli8 push ccli8/mbed-mcuboot-blinky

ccli8
ccli8

Support Nuvoton targets

  1. Adjust mbed_app.json (1) Work around MCUBOOT_HAVE_LOGGING missing in mbed port's mcuboot_config.h (2) Change log level to 'INFO'. (3) Change default UART baudrate to 115200
  2. Support targets:
    • NUMAKER_IOT_M487
  3. Add NUSD for candidate firmware storage (1) Configure NUSD as default block device (BlockDevice::get_default_instance()) (2) Use NuSDFlashSimBlockDevice instead of NuSDBlockDevice for MCUboot's flash map backend (get_secondary_bd) for the below requirements: 1) Actual erase to 0xFF 2) Larger erase unit than 512 to be consistent with internal flash's sector size 3) 1-byte/1-word read unit 4) 1-byte/1-word program unit
  4. Embed update candidate through data array rather than reserved space. This is to make flash layout consistent among update test and normal use.
  5. Enable button's GPIO interrupt which is needed for Nuvoton targets to wake up from sleep.
  6. Notes for mbed_app.json: (1) MCUboot configuration must be consistent with mbed-mcuboot-demo. (2) KVStore, though unused, is configured to help demo flash layout.

commit sha: 6b73c2b8737dc85089a8af7886b3160968a03986

push time in 1 week ago
push

ccli8 push ccli8/mbed-mcuboot-demo

ccli8
ccli8

Support Nuvoton targets

  1. Adjust mbed_app.json (1) Work around MCUBOOT_HAVE_LOGGING missing in mbed port's mcuboot_config.h (2) Change log level to 'INFO'. (3) Change default UART baudrate to 115200 (4) Enlarge default boot stack size to fix boot stack overflow
  2. Support targets:
    • NUMAKER_IOT_M487
  3. Add NUSD for candidate firmware storage (1) Configure NUSD as default block device (BlockDevice::get_default_instance()) (2) Use NuSDFlashSimBlockDevice instead of NuSDBlockDevice for MCUboot's flash map backend (get_secondary_bd) for the below requirements: 1) Actual erase to 0xFF 2) Larger erase unit than 512 to be consistent with internal flash's sector size 3) 1-byte/1-word read unit 4) 1-byte/1-word program unit
  4. Notes for MCUboot configuration (1) According to code fragment below, boot_slots_compatible() can fail because BOOT_MAX_IMG_SECTORS is based on internal flash sector, with which num_sectors_secondary, for external flash, is incompatible. To comply with it, mcuboot.max-img-sectors is derived from mcuboot.slot-size / sector size, which is the minimum of internal/external flash sector sizes. https://github.com/mcu-tools/mcuboot/blob/9eff1e08bd13ca9f0723f06aa7b386f09828956a/boot/bootutil/src/swap_scratch.c#L185-L189 NOTE: When external flash is backed by NUSD, NUSD is NuSDFlashSimBlockDevice which has adapted sector size other than 512. (2) According to code fragment below, mcuboot.scratch-size, though undocumented, must be larger than trailer size, which majorly depends on mcuboot.max-img-sectors. https://github.com/mcu-tools/mcuboot/blob/9eff1e08bd13ca9f0723f06aa7b386f09828956a/boot/bootutil/src/swap_scratch.c#L517-L520 https://github.com/mcu-tools/mcuboot/blob/9eff1e08bd13ca9f0723f06aa7b386f09828956a/boot/bootutil/src/swap_scratch.c#L452 (3) To enable rollback, it is safe to reserve trailer(+TLV) size: mcuboot.max-img-sectors x 12 + 2KiB

commit sha: 41e42e283b22c48aad672248a76e2606696ce0b0

push time in 1 week ago
Jan
11
1 week ago
push

ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: c07e59d949b2c38c60d276ff894387fa439913f9

push time in 1 week ago
push

ccli8 push ccli8/trusted-firmware-m

ccli8
ccli8

HAL: Fix for MPU isolation region configuration

MPU region indices are hard-coded on some platforms. After removing the ER_INITIAL_PSP section, the MPU region indices update was missed.

This patch changes to runtime update indices to fix this issue.

Change-Id: Iaf5213ec7e0dc529b4c08197b4b2cbe4c5598ab4 Signed-off-by: Mingyang Sun [email protected]

ccli8
ccli8

SPM: Rename 'thread call' with 'cross call'

Name "thread call" could not explicitly reflect the behaviour of call type. This call crosses between caller and callee stack, which enables caller and callee context to be sealed in their stack.

Rename this call with "cross call" to make the code more readable. It will also benefit the upcoming optimization work.

Signed-off-by: Xinyu Zhang [email protected] Change-Id: I7d2de563b6f498bde70e302065e743344d2a20fc

ccli8
ccli8

Platform: PSoC64: Add support for SLIH tests

Add support for SLIH tests. FLIH test doesn't work yet.

Change-Id: Ic31c9451cc86b4a0ca7a5119692086b4a7e41150 Signed-off-by: Chris Brand [email protected]

ccli8
ccli8

Docs: Fix incorrect project version generation.

The documentation version generates differently in the local and CI building environments. The expectation is to have the version in the form of "v1.5.0+(last commit SHA)" while CI makes it v1.5.0.

Signed-off-by: Anton Komlev [email protected] Change-Id: Ia989c1c169a614e169f1defdaa3ca34c4e0cf643

ccli8
ccli8

Build: Fix warning in IPC mode

spm_handle_programmer_errors() function need to be used only after including the corresponding header ffm/psa_api.h to avoid compiler warnings.

Signed-off-by: Antonio de Angelis [email protected] Change-Id: If58726a5e25a8b0245fa25b8995135dc5b8bd8d3

ccli8
ccli8

Platform: nuvoton/m2354: Patch for integration with Mbed OS 6

  1. Remove all __NONSECURE_ENTRY(_WEAK) in BSP driver (esp. sys.c/clk.c). Replace with platform ioctl
  2. BL2 linker file say GNUARM doesn't support SG section, With above patch, we can contain sys.c/clk.c and then call SYS/CLK driver API in BL2.
  3. Enable clock sources: HIRC/HXT/LIRC/LXT/HIRC48 for general use by Mbed OS applications.
  4. Change PLL clock source to HXT from HIRC for accuratcy required by Mbed OS tests.
  5. Configure NSCBA programmatic (at first boot) so that we needn't external programming tool extra
  6. Default to (shallow) sleep/idle mode configuration. This is to remove SPE/NSPE boundary latency for (shallow) sleep and to pass related tests.
  7. Adjust partition_M2354.h (1) Remove redundant partition_M2354 in bsp/Library/StdDriver/inc to avoid unintended inclusion. (2) Configure all configurable peripherals to NS except: 1) UART1 to S on SECURE_UART1 defined 2) Crypto to S to allow acceleration for Mbed Crypto (3) Configure all I/O pins to NS (4) Configure all I/O interrupts (GPA-H, EINT0-7) targeting NS (5) All SAU_INIT_XXX are unchanged. SAU configuration is done via region_defs.h and linker-generated symbols in TF-M (6) Confirm SCB_AIRCR_SYSRESETREQS_VAL is 0 to avoid failures of debugger reset and Mbed Greentea test reset through write 1 to AIRCR.SYSRESETREQ. (7) Fix FMC_SECURE_ROM_SIZE
  8. Implement platform extra secure functions via platform ioctl (1) Update CMakeLists.cmake to add relevant files into platform_s/platform_ns (2) platform_extra_secure.h/c contain implementation of these functions These two files are shared between TF-M and Mbed OS for easy client/service consistency check
  9. Fix tfm_s ARMCLANG scatter file error by changing to common one
  10. Bugfix (1) In target_cfg.c, also target INTs of hard-wired secure RTC/WDT to NS? Remove for clarity (2) In target_cfg.c/system_reset_cfg(), honor SCB_AIRCR_SYSRESETREQS_VAL defined in partition_M2354.h (3) In system_core_init.c, fix SystemCoreClockUpdate where SPE's SystemCoreClock can be indirectly checked by NSPE (4) Correct CMakeLists.txt for "-DTFM_IRQ_TEST=ON". (5) Correct TFM_TIMER1_IRQ to TMR2_IRQn because TFM TIMER1 (virtual) is implemented with M2354 TIMER2 (real) (6) Fix timer_cmsdk_init relies on Timer_Open for platform_ns build target. It can cause redefinition error when linking with Mbed OS (7) Enhance conditional compile for CORE_TEST_INTERACTIVE/TFM_ENABLE_PERIPH_ACCESS_TEST/TFM_ENABLE_IRQ_TEST

NOTE: "-DTFM_IRQ_TEST=ON" (TFM_ENABLE_IRQ_TEST) doesn't work yet. Regression test fails in tfm_s. Cause is unknown

Change-Id: I66171367a730f81d0a43e1ca04ca9bb512392325

ccli8
ccli8

Platform: nuvoton/m2354: Enable TRNG entropy source

  1. Add cmake stuff for enabling crypto accelerator
  2. Implement mbedtls_hardware_poll using TRNG
  3. Remove TRNG platform extra secure functions due to replaced with above

Change-Id: I9132d6792cd4ce3770eaa0704b7290835c356bfc

ccli8
ccli8

Platform: nuvoton/m2354: Enable configurability of HXT presence

This is to spare one HXT component if HIRC's accuracy is acceptable.

HXT defaults to not present.

Change-Id: I665083908eca264e9ae1f3a00bf5c7fc56172c52

ccli8
ccli8

Platform: nuvoton/m2354: Fix CRYPTO_HW_ACCELERATOR and CRYPTO_NV_SEED cannot co-exist

Change-Id: I75d69a9c6bebc66d74b81606cb099898e33b3d7f

ccli8
ccli8

Platform: nuvoton/m2354: Fix potential FMC failure with protected registers

Unlock FMC protected registers before access to them

Change-Id: I3013c9ce3d82fc8a221966e84ddec4cd4140cb2f

ccli8
ccli8

Platform: nuvoton/m2354: Support SDH as CMSIS Flash driver

Implementation notes:

  1. Add cmake variable NU_SDH_CMSIS_FLASH to determine enable or not. Default is ON.
  2. SDH can only be secure for access to secure DMA buffer.
  3. Continuing above, NSPE cannot access the secure SDH.
  4. On enabled, tweak BSP SDH driver: (1) Go non-interrupt (NU_SDH_DIS_INTR). Secure interrupt isn't trivial and needs change to partition manifest file. (2) Enable response in/data in timeout (NU_SDH_ENA_TIMEOUT). This is to escape trap with defected SD card.
  5. On enabled, cover upper layer missing doing initializing SDH for read/program/erase operations.
  6. On enabled, simulate dummy SD card on probing no SD card for MCUboot because MCUboot will panic on read failure.
  7. On enabled, emulate flash program attribute: Transition to 1 from 0 won't occur.
  8. With DMA buffer for intermediate, read/program are not limited to sector-aligned.

Change-Id: Iad4cec4e71c37622b688594becf178124e7847eb

ccli8
ccli8

Platform: nuvoton/m2354: Adjust config in favor of Pelion

  1. Adjust ITS/PS. Enlarge PS especially.
  2. Enlarge mbedtls dedicated heap to avoid mbedtls_calloc() failure in ECDSA.
  3. Enlarge secure RAM size for above to fit

NOTE1: Meet HardFault in below test: Running Test Suite PS rollback protection tests (TFM_PS_TEST_4XXX)...

Executing 'TFM_PS_TEST_4001' Description: 'Check PS area version when NV counters 1/2/3 have the same value' Result from stack overflow with larger PS_NUM_ASSETS. Try enlarging stack size in partition manifest: tf-m-tests/test/test_services/tfm_ps_test_service/tfm_ps_test_service.yaml

NOTE2: Partition RAM in 16KiB unit

Change-Id: Ibe82a857f3aa7dc45eb69c70369846a9c5fca9ba

ccli8
ccli8

Platform: nuvoton/m2354: Support PSA Firmware Update

  1. Remove boot_hal.c from platform_s, which is necessary only for platform_bl2.
  2. Support SDH as update stage, which is enabled by default. NOTE: For platform_bl2, simulate dummy SD card on detached because MCUboot will panic on read failure. NOTE: For platform_s, cover upper layer missing doing SDH initialization.
  3. Support embedded Flash as update stage, which isn't enabled by default.
  4. Support multiple image boot, which becomes the default.
  5. Fix FMC_SECURE_ROM_SIZE (partition_M2354.h) Original value becomes incorrect when enabling embedded Flash as update stage

Change-Id: Ia6708a1cb15fe3c45363276866bc32ecda0c3adb

ccli8
ccli8

Platform: nuvoton/m2354: Default to IPC mode/Isolation level 2

Change-Id: I10f624dd0e09f55fc06a3305a8b53dd01ba1f52c

ccli8
ccli8

Platform: nuvoton/m2354: Enhance SDH stability

  1. On SDH H/W timeout enabled, lower SDH clock to avoid premature timeout (TOUT / SDH clock)
  2. Re-initialize SDH on SDH (timeout) failure

Change-Id: Ib805a616faa4346dab5208c620cc0e20b34ba3e5

ccli8
ccli8

Platform: nuvoton/m2354: Fix TFM_SP_PS_TEST test broken on PS_NUM_ASSETS enlarged

Refer to its bug report: https://developer.trustedfirmware.org/T956

Change-Id: I37df0964dd3d019ad65ed4e455dc4ff2baaef2e8

ccli8
ccli8

Platform: nuvoton/m2354: Fix LCDCP_MODULE missing in CLK pass list

Besides LCD_MODULE, add LCDCP_MODULE into pass list for below CLK driver in NSPE:

  • CLK_SetModuleClock_S
  • CLK_EnableModuleClock_S
  • CLK_DisableModuleClock_S
  • CLK_GetModuleClockSource_S

Change-Id: I312fff77a08c2512e22a98990c4c85ebb256dff4

ccli8
ccli8

Platform: nuvoton/m2354: Enable mcuboot log forcibly

Some CMAKE_BUILD_TYPE like 'Release' can override mcuboot log to disabled. Enable it forcibly to help check firmware update process.

Change-Id: I3c9800077a55b89c96c43cc1c077ebe4036a3104

ccli8
ccli8

Platform: nuvoton/m2354: Adjust configuration to fit AWS IoT

  1. Enlarge ITS max asset number/size NOTE: RSA key size is larger
  2. Enlarge mbedtls dedicated heap NOTE: RSA algorithm needs more memory. NOTE: psa_aead_decrypt() (for mbedtls_ssl_read()) needs memory proportional to data size.

Change-Id: Ia5dbea50635cd76e94d2b9094c19f51f568fa1be

ccli8
ccli8

Platform: nuvoton/m2354: Add crypto_hw_accelerator_huk_derive_key()

Needed on CRYPTO_HW_ACCELERATOR enabled

Change-Id: Ic876b8a843265958d6e761c69ece2af09aac885d

commit sha: a268dc65cd037aff65a6a9125db9d9e72bc9af4f

push time in 1 week ago
push

ccli8 push ccli8/trusted-firmware-m

ccli8
ccli8

HAL: Fix for MPU isolation region configuration

MPU region indices are hard-coded on some platforms. After removing the ER_INITIAL_PSP section, the MPU region indices update was missed.

This patch changes to runtime update indices to fix this issue.

Change-Id: Iaf5213ec7e0dc529b4c08197b4b2cbe4c5598ab4 Signed-off-by: Mingyang Sun [email protected]

ccli8
ccli8

SPM: Rename 'thread call' with 'cross call'

Name "thread call" could not explicitly reflect the behaviour of call type. This call crosses between caller and callee stack, which enables caller and callee context to be sealed in their stack.

Rename this call with "cross call" to make the code more readable. It will also benefit the upcoming optimization work.

Signed-off-by: Xinyu Zhang [email protected] Change-Id: I7d2de563b6f498bde70e302065e743344d2a20fc

ccli8
ccli8

Platform: PSoC64: Add support for SLIH tests

Add support for SLIH tests. FLIH test doesn't work yet.

Change-Id: Ic31c9451cc86b4a0ca7a5119692086b4a7e41150 Signed-off-by: Chris Brand [email protected]

ccli8
ccli8

Docs: Fix incorrect project version generation.

The documentation version generates differently in the local and CI building environments. The expectation is to have the version in the form of "v1.5.0+(last commit SHA)" while CI makes it v1.5.0.

Signed-off-by: Anton Komlev [email protected] Change-Id: Ia989c1c169a614e169f1defdaa3ca34c4e0cf643

ccli8
ccli8

Build: Fix warning in IPC mode

spm_handle_programmer_errors() function need to be used only after including the corresponding header ffm/psa_api.h to avoid compiler warnings.

Signed-off-by: Antonio de Angelis [email protected] Change-Id: If58726a5e25a8b0245fa25b8995135dc5b8bd8d3

ccli8
ccli8

Platform: nuvoton/m2354: Patch for integration with Mbed OS 6

  1. Remove all __NONSECURE_ENTRY(_WEAK) in BSP driver (esp. sys.c/clk.c). Replace with platform ioctl
  2. BL2 linker file say GNUARM doesn't support SG section, With above patch, we can contain sys.c/clk.c and then call SYS/CLK driver API in BL2.
  3. Enable clock sources: HIRC/HXT/LIRC/LXT/HIRC48 for general use by Mbed OS applications.
  4. Change PLL clock source to HXT from HIRC for accuratcy required by Mbed OS tests.
  5. Configure NSCBA programmatic (at first boot) so that we needn't external programming tool extra
  6. Default to (shallow) sleep/idle mode configuration. This is to remove SPE/NSPE boundary latency for (shallow) sleep and to pass related tests.
  7. Adjust partition_M2354.h (1) Remove redundant partition_M2354 in bsp/Library/StdDriver/inc to avoid unintended inclusion. (2) Configure all configurable peripherals to NS except: 1) UART1 to S on SECURE_UART1 defined 2) Crypto to S to allow acceleration for Mbed Crypto (3) Configure all I/O pins to NS (4) Configure all I/O interrupts (GPA-H, EINT0-7) targeting NS (5) All SAU_INIT_XXX are unchanged. SAU configuration is done via region_defs.h and linker-generated symbols in TF-M (6) Confirm SCB_AIRCR_SYSRESETREQS_VAL is 0 to avoid failures of debugger reset and Mbed Greentea test reset through write 1 to AIRCR.SYSRESETREQ. (7) Fix FMC_SECURE_ROM_SIZE
  8. Implement platform extra secure functions via platform ioctl (1) Update CMakeLists.cmake to add relevant files into platform_s/platform_ns (2) platform_extra_secure.h/c contain implementation of these functions These two files are shared between TF-M and Mbed OS for easy client/service consistency check
  9. Fix tfm_s ARMCLANG scatter file error by changing to common one
  10. Bugfix (1) In target_cfg.c, also target INTs of hard-wired secure RTC/WDT to NS? Remove for clarity (2) In target_cfg.c/system_reset_cfg(), honor SCB_AIRCR_SYSRESETREQS_VAL defined in partition_M2354.h (3) In system_core_init.c, fix SystemCoreClockUpdate where SPE's SystemCoreClock can be indirectly checked by NSPE (4) Correct CMakeLists.txt for "-DTFM_IRQ_TEST=ON". (5) Correct TFM_TIMER1_IRQ to TMR2_IRQn because TFM TIMER1 (virtual) is implemented with M2354 TIMER2 (real) (6) Fix timer_cmsdk_init relies on Timer_Open for platform_ns build target. It can cause redefinition error when linking with Mbed OS (7) Enhance conditional compile for CORE_TEST_INTERACTIVE/TFM_ENABLE_PERIPH_ACCESS_TEST/TFM_ENABLE_IRQ_TEST

NOTE: "-DTFM_IRQ_TEST=ON" (TFM_ENABLE_IRQ_TEST) doesn't work yet. Regression test fails in tfm_s. Cause is unknown

Change-Id: I66171367a730f81d0a43e1ca04ca9bb512392325

ccli8
ccli8

Platform: nuvoton/m2354: Enable TRNG entropy source

  1. Add cmake stuff for enabling crypto accelerator
  2. Implement mbedtls_hardware_poll using TRNG
  3. Remove TRNG platform extra secure functions due to replaced with above

Change-Id: I9132d6792cd4ce3770eaa0704b7290835c356bfc

ccli8
ccli8

Platform: nuvoton/m2354: Enable configurability of HXT presence

This is to spare one HXT component if HIRC's accuracy is acceptable.

HXT defaults to not present.

Change-Id: I665083908eca264e9ae1f3a00bf5c7fc56172c52

ccli8
ccli8

Platform: nuvoton/m2354: Fix CRYPTO_HW_ACCELERATOR and CRYPTO_NV_SEED cannot co-exist

Change-Id: I75d69a9c6bebc66d74b81606cb099898e33b3d7f

ccli8
ccli8

Platform: nuvoton/m2354: Fix potential FMC failure with protected registers

Unlock FMC protected registers before access to them

Change-Id: I3013c9ce3d82fc8a221966e84ddec4cd4140cb2f

ccli8
ccli8

Platform: nuvoton/m2354: Support SDH as CMSIS Flash driver

Implementation notes:

  1. Add cmake variable NU_SDH_CMSIS_FLASH to determine enable or not. Default is ON.
  2. SDH can only be secure for access to secure DMA buffer.
  3. Continuing above, NSPE cannot access the secure SDH.
  4. On enabled, tweak BSP SDH driver: (1) Go non-interrupt (NU_SDH_DIS_INTR). Secure interrupt isn't trivial and needs change to partition manifest file. (2) Enable response in/data in timeout (NU_SDH_ENA_TIMEOUT). This is to escape trap with defected SD card.
  5. On enabled, cover upper layer missing doing initializing SDH for read/program/erase operations.
  6. On enabled, simulate dummy SD card on probing no SD card for MCUboot because MCUboot will panic on read failure.
  7. On enabled, emulate flash program attribute: Transition to 1 from 0 won't occur.
  8. With DMA buffer for intermediate, read/program are not limited to sector-aligned.

Change-Id: Iad4cec4e71c37622b688594becf178124e7847eb

ccli8
ccli8

Platform: nuvoton/m2354: Adjust config in favor of Pelion

  1. Adjust ITS/PS. Enlarge PS especially.
  2. Enlarge mbedtls dedicated heap to avoid mbedtls_calloc() failure in ECDSA.
  3. Enlarge secure RAM size for above to fit

NOTE1: Meet HardFault in below test: Running Test Suite PS rollback protection tests (TFM_PS_TEST_4XXX)...

Executing 'TFM_PS_TEST_4001' Description: 'Check PS area version when NV counters 1/2/3 have the same value' Result from stack overflow with larger PS_NUM_ASSETS. Try enlarging stack size in partition manifest: tf-m-tests/test/test_services/tfm_ps_test_service/tfm_ps_test_service.yaml

NOTE2: Partition RAM in 16KiB unit

Change-Id: Ibe82a857f3aa7dc45eb69c70369846a9c5fca9ba

ccli8
ccli8

Platform: nuvoton/m2354: Support PSA Firmware Update

  1. Remove boot_hal.c from platform_s, which is necessary only for platform_bl2.
  2. Support SDH as update stage, which is enabled by default. NOTE: For platform_bl2, simulate dummy SD card on detached because MCUboot will panic on read failure. NOTE: For platform_s, cover upper layer missing doing SDH initialization.
  3. Support embedded Flash as update stage, which isn't enabled by default.
  4. Support multiple image boot, which becomes the default.
  5. Fix FMC_SECURE_ROM_SIZE (partition_M2354.h) Original value becomes incorrect when enabling embedded Flash as update stage

Change-Id: Ia6708a1cb15fe3c45363276866bc32ecda0c3adb

ccli8
ccli8

Platform: nuvoton/m2354: Default to IPC mode/Isolation level 2

Change-Id: I10f624dd0e09f55fc06a3305a8b53dd01ba1f52c

ccli8
ccli8

Platform: nuvoton/m2354: Enhance SDH stability

  1. On SDH H/W timeout enabled, lower SDH clock to avoid premature timeout (TOUT / SDH clock)
  2. Re-initialize SDH on SDH (timeout) failure

Change-Id: Ib805a616faa4346dab5208c620cc0e20b34ba3e5

ccli8
ccli8

Platform: nuvoton/m2354: Fix TFM_SP_PS_TEST test broken on PS_NUM_ASSETS enlarged

Refer to its bug report: https://developer.trustedfirmware.org/T956

Change-Id: I37df0964dd3d019ad65ed4e455dc4ff2baaef2e8

ccli8
ccli8

Platform: nuvoton/m2354: Fix LCDCP_MODULE missing in CLK pass list

Besides LCD_MODULE, add LCDCP_MODULE into pass list for below CLK driver in NSPE:

  • CLK_SetModuleClock_S
  • CLK_EnableModuleClock_S
  • CLK_DisableModuleClock_S
  • CLK_GetModuleClockSource_S

Change-Id: I312fff77a08c2512e22a98990c4c85ebb256dff4

ccli8
ccli8

Platform: nuvoton/m2354: Enable mcuboot log forcibly

Some CMAKE_BUILD_TYPE like 'Release' can override mcuboot log to disabled. Enable it forcibly to help check firmware update process.

Change-Id: I3c9800077a55b89c96c43cc1c077ebe4036a3104

ccli8
ccli8

Platform: nuvoton/m2354: Adjust configuration to fit AWS IoT

  1. Enlarge ITS max asset number/size NOTE: RSA key size is larger
  2. Enlarge mbedtls dedicated heap NOTE: RSA algorithm needs more memory. NOTE: psa_aead_decrypt() (for mbedtls_ssl_read()) needs memory proportional to data size.

Change-Id: Ia5dbea50635cd76e94d2b9094c19f51f568fa1be

ccli8
ccli8

Platform: nuvoton/m2354: Add crypto_hw_accelerator_huk_derive_key()

Needed on CRYPTO_HW_ACCELERATOR enabled

Change-Id: Ic876b8a843265958d6e761c69ece2af09aac885d

commit sha: 3586b462dacd5fc328c96be8c155508896158be7

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ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: 326489e3ced986d3fe3687392f98fee1e5c4c361

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ccli8 in OpenNuvoton/mbed delete branch nuvoton_m487_fix-uart67-base

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ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: 86f50d913485beb69b61b7b9fe89e3276519d4a2

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ccli8 push ccli8/mbed-os

ccli8
ccli8

Support Nuvoton target NUMAKER_IOT_M467

  1. Enable export to Keil/IAR project
    • tools/arm_pack_manager/index.json
    • tools/export/iar/iar_definitions.json

commit sha: b9bf25d79207aa90a91529f14549659a72ec32a9

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