manoj153

manoj153

Design & Development of firmware & hardware, Consultant

Member Since 5 years ago

Electrolance Solutions, Kuala Lumpur, Malaysia

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895 contributions in the last year

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⚡ Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Activity
Jan
23
1 day ago
Activity icon
issue

manoj153 issue comment zephyrproject-rtos/zephyr

manoj153
manoj153

Request for Flash Logging feature

Problem It's very difficult to connect UART/Jlink to get logs in-field devices. and some of my devices getting crash after 3 to 4 days but I get no log to debug the issue.

Solution I am looking for a feature where I can store the normal/crash logs in flash. Similar to Nordic_SDK_Flash_Logging_feature

Please give some pointers So I can try it.

Jan
18
6 days ago
Jan
16
1 week ago
push

manoj153 push manoj153/zephyr

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xxq

The Q variant is the same as non-Q, except the Q has SMPS built-in. This symbol addition is to have the correct SOC definition ("STM32H7A3XXQ")

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: kconfig workaround to handle SoC H7A3XX-Q P/N

Set the correct soc string so that the correct CMSIS file is being utilised.

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

drivers: clock_control: stm32h7: Support SoC STM32H7A3XX / STM32H7A3XX-Q

clock requirement

Introduce a new group of clock setting to fit in this series of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: Add support for nucleo_h7a3zi_q

Introduce this board, rcc config: the SoC uses slightly different domain naming, eg: cdppre is equivalent to d1ppre D1 = CD D2 = CD<..>2 D3 = SRD

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: nucleo h7a3zi-q: enable SMPS

SMPS supply is default for this board

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

samples: drivers: nucleo_h7a3zi_q: Configuring ADC sample application

I tested ADC sample on the board mentioned above 0v = 0 3.3v = 4095

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

tests: drivers: STM32: Enabling ADC tests for nucleo_h7a3zi_q

This commit enables test_adc to build and run for this new board

Signed-off-by: Manojkumar Subramaniam [email protected]

commit sha: 8c8fb79ca1d27906ce6fc57670c4dee152e43496

push time in 1 week ago
push

manoj153 push manoj153/zephyr

manoj153
manoj153

dts: arm: st: h7a3: add support for stm32h7a3

Introduce device tree support for this family of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xx support

Basic kconfig config.

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: kconfig workaround to handle SoC H7A3XX-Q P/N

Set the correct soc string so that the correct CMSIS file is being utilised.

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xxq

The Q variant is the same as non-Q, except the Q has SMPS built-in. This symbol addition is to have the correct SOC definition ("STM32H7A3XXQ")

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

drivers: clock_control: stm32h7: Support SoC STM32H7A3XX / STM32H7A3XX-Q

clock requirement

Introduce a new group of clock setting to fit in this series of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: Add support for nucleo_h7a3zi_q

Introduce this board, rcc config: the SoC uses slightly different domain naming, eg: cdppre is equivalent to d1ppre D1 = CD D2 = CD<..>2 D3 = SRD

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: nucleo h7a3zi-q: enable SMPS

SMPS supply is default for this board

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

samples: drivers: nucleo_h7a3zi_q: Configuring ADC sample application

I tested ADC sample on the board mentioned above 0v = 0 3.3v = 4095

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

tests: drivers: STM32: Enabling ADC tests for nucleo_h7a3zi_q

This commit enables test_adc to build and run for this new board

Signed-off-by: Manojkumar Subramaniam [email protected]

commit sha: db78964ed0f86f2d6a90784ea970074cdaee81dc

push time in 1 week ago
Jan
15
1 week ago
push

manoj153 push manoj153/zephyr

manoj153
manoj153

dts: arm: st: h7a3: add support for stm32h7a3

Introduce device tree support for this family of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xx support

Basic kconfig config.

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: kconfig workaround to handle SoC H7A3XX-Q P/N

Set the correct soc string so that the correct CMSIS file is being utilised.

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xxq

The Q variant is the same as non-Q, except the Q has SMPS built-in. This symbol addition is to have the correct SOC definition ("STM32H7A3XXQ")

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

drivers: clock_control: stm32h7: Support SoC STM32H7A3XX / STM32H7A3XX-Q

clock requirement

Introduce a new group of clock setting to fit in this series of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: Add support for nucleo_h7a3zi_q

Introduce this board, rcc config: the SoC uses slightly different domain naming, eg: cdppre is equivalent to d1ppre D1 = CD D2 = CD<..>2 D3 = SRD

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: nucleo h7a3zi-q: enable SMPS

SMPS supply is default for this board

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

samples: drivers: nucleo_h7a3zi_q: Configuring ADC sample application

I tested ADC sample on the board mentioned above 0v = 0 3.3v = 4095

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

tests: drivers: STM32: Enabling ADC tests for nucleo_h7a3zi_q

This commit enables test_adc to build and run for this new board

Signed-off-by: Manojkumar Subramaniam [email protected]

commit sha: 61a2fbd6f712eee7bfb3aff30c17161e8555e332

push time in 1 week ago
open pull request

manoj153 wants to merge zephyrproject-rtos/zephyr

manoj153
manoj153

Do you mean also reserved are excluded?

image

I can see from the datasheet that the total mux input is 127, reserved are 16, which means the max possible ID entry is 111. I wanted to confirm I am right, and please correct me if anything is wrong. Thanks, and I appreciate your review and feedback.

Jan
11
1 week ago
Activity icon
issue

manoj153 issue comment zephyrproject-rtos/zephyr

manoj153
manoj153

@FRASTM @ABOSTM Will, you guys, mind formally doing a review and +1 if it looks good to you.

Thanks

Activity icon
issue

manoj153 issue comment zephyrproject-rtos/zephyr

manoj153
manoj153

Ok, valid. Should I drop arduino_gpio too?

No this one is fine as there is proper arduino gpio table description.

Thanks, CI is happy now, thanks to you!

Jan
10
2 weeks ago
push

manoj153 push manoj153/zephyr

manoj153
manoj153

boards: Add support for nucleo_h7a3zi_q

Introduce this board, rcc config: the SoC uses slightly different domain naming, eg: cdppre is equivalent to d1ppre D1 = CD D2 = CD<..>2 D3 = SRD

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: nucleo h7a3zi-q: enable SMPS

SMPS supply is default for this board

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

samples: drivers: nucleo_h7a3zi_q: Configuring ADC sample application

I tested ADC sample on the board mentioned above 0v = 0 3.3v = 4095

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

tests: drivers: STM32: Enabling ADC tests for nucleo_h7a3zi_q

This commit enables test_adc to build and run for this new board

Signed-off-by: Manojkumar Subramaniam [email protected]

commit sha: 704db1136cc6582e1ba8a60483f8cf0265cf073d

push time in 1 week ago
Activity icon
issue

manoj153 issue comment zephyrproject-rtos/zephyr

manoj153
manoj153

@manoj153 Would you mind fixing issue reported by CI here

I think it's the due absence of arduino_i2c

image

push

manoj153 push manoj153/zephyr

manoj153
manoj153

soc: arm: stm32h7: kconfig workaround to handle SoC H7A3XX-Q P/N

Set the correct soc string so that the correct CMSIS file is being utilised.

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xxq

The Q variant is the same as non-Q, except the Q has SMPS built-in. This symbol addition is to have the correct SOC definition ("STM32H7A3XXQ")

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

drivers: clock_control: stm32h7: Support SoC STM32H7A3XX / STM32H7A3XX-Q

clock requirement

Introduce a new group of clock setting to fit in this series of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: Add support for nucleo_h7a3zi_q

Introduce this board, rcc config: the SoC uses slightly different domain naming, eg: cdppre is equivalent to d1ppre D1 = CD D2 = CD<..>2 D3 = SRD

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: nucleo h7a3zi-q: enable SMPS

SMPS supply is default for this board

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

samples: drivers: nucleo_h7a3zi_q: Configuring ADC sample application

I tested ADC sample on the board mentioned above 0v = 0 3.3v = 4095

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

tests: drivers: STM32: Enabling ADC tests for nucleo_h7a3zi_q

This commit enables test_adc to build and run for this new board

Signed-off-by: Manojkumar Subramaniam [email protected]

commit sha: 5f97a8fe521805cee517a9f9729dbd1070e9a485

push time in 1 week ago
Activity icon
issue

manoj153 issue comment zephyrproject-rtos/zephyr

manoj153
manoj153

I am looking at it, and I can move the samples: drivers: nucleo_h7a3zi_q: Configuring ADC sample application commit after introducing the board (no code-changes) just re-ordering commit

Activity icon
issue

manoj153 issue comment zephyrproject-rtos/zephyr

manoj153
manoj153

Thanks @manoj153. Approved now. Might require some commit reordering to make sure stuff is defined before being used, but I won't block for this, considering the number of previous iterations.

Can you let me know which commit are they?

Jan
9
2 weeks ago
push

manoj153 push manoj153/zephyr

manoj153
manoj153

drivers: clock_control: stm32h7: Support SoC STM32H7A3XX / STM32H7A3XX-Q

clock requirement

Introduce a new group of clock setting to fit in this series of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: kconfig workaround to handle SoC H7A3XX-Q P/N

Set the correct soc string so that the correct CMSIS file is being utilised.

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

tests: drivers: STM32: Enabling ADC tests for nucleo_h7a3zi_q

This commit enables test_adc to build and run for this new board

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

samples: drivers: nucleo_h7a3zi_q: Configuring ADC sample application

I tested ADC sample on the board mentioned above 0v = 0 3.3v = 4095

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xxq

The Q variant is the same as non-Q, except the Q has SMPS built-in. This symbol addition is to have the correct SOC definition ("STM32H7A3XXQ")

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: Add support for nucleo_h7a3zi_q

Introduce this board, rcc config: the SoC uses slightly different domain naming, eg: cdppre is equivalent to d1ppre D1 = CD D2 = CD<..>2 D3 = SRD

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: nucleo h7a3zi-q: enable SMPS

SMPS supply is default for this board

Signed-off-by: Manojkumar Subramaniam [email protected]

commit sha: 6c969e4586fde8382b1147c19ccaa177ffef6e39

push time in 2 weeks ago
push

manoj153 push manoj153/zephyr

manoj153
manoj153

Bluetooth: Controller: Fix Periodic Adv EVENT_OVERHEAD_START_US jitter

As EVENT_OVERHEAD_START_US offset is used in ticks unit in LLL, ULL scheduling using ticker should also use ticks unit for EVENT_OVERHEAD_START_US when reducing the first Periodic Advertising event preparation.

Relates to commit 858dc7fab469 ("Bluetooth: controller: Fix EVENT_OVERHEAD_START_US jitter").

Signed-off-by: Vinayak Kariappa Chettimada [email protected]

manoj153
manoj153

Bluetooth: Controller: Fix Extended Scan Response Secondary PHY value

Fix Extended Scan Response report Secondary PHY value to use AUX_ADV_IND PHY.

Signed-off-by: Vinayak Kariappa Chettimada [email protected]

manoj153
manoj153

Bluetooth: Controller: Fix HCI fragment of Extended Advertising Report

Fix HCI fragment of Extended Advertising Report when chain PDUs are received. Implementation was missing HCI event generation for last frag of each PDU when there was a next chain PDU.

Signed-off-by: Vinayak Kariappa Chettimada [email protected]

manoj153
manoj153

Bluetooth: Controller: Fix Extended AD data and Scan Rsp total len type

Fix Extended Advertising Report's AD data and Scan Response total data length type to use uint16_t.

Signed-off-by: Vinayak Kariappa Chettimada [email protected]

manoj153
manoj153

Bluetooth: Controller: Fix Periodic Adv Sync to private address

Fix Periodic Advertising Synchronization to private address when public and static identity address is supplied as peer device address to synchronize to.

Signed-off-by: Vinayak Kariappa Chettimada [email protected]

manoj153
manoj153

Bluetooth: Controller: Fix erroneous merge conflict resolution

Fix erroneous merge conflict resolution.

Regression in commit f023b5f611df ("Bluetooth: controller: push topic branch to main") and commit 2e2900f1bb4f ("Bluetooth: controller: revert erroneous deletion").

Signed-off-by: Vinayak Kariappa Chettimada [email protected]

manoj153
manoj153

Bluetooth: Controller: Remove redundant extra list release

Periodic Advertising Synchronization Reports do not use a list for the received chain PDUs, remove the stale code that free extra list.

Signed-off-by: Vinayak Kariappa Chettimada [email protected]

manoj153
manoj153

Bluetooth: Controller: Fix Periodic Advertising Sync aux context leak

Fix Periodic Advertising Synchronization Auxiliary context leak when failing to receive chain PDUs. Auxiliary context has not being associated with sync context when ULL scheduling was used.

Signed-off-by: Vinayak Kariappa Chettimada [email protected]

manoj153
manoj153

Bluetooth: controller: inclusive naming for EDTT

Update the testnames according to the Bluetooth 5.3 specification for inclusive naming

Signed-off-by: Andries Kruithof [email protected]

manoj153
manoj153

cmake: armlink: remove sourcing of ld/target_base.cmake file

The armlink/target.cmake should not source ld/target_base.cmake file as it provides its own (empty) implementation of the toolchain_ld_base macro.

Signed-off-by: Torsten Rasmussen [email protected]

manoj153
manoj153

cmake: armlink: fix handling of argument in configure_linker_script

The PR #40174 changed configure_linker_script() macro from handling a single string to handle a list of strings for the linker_pass_define argument.

This changed the armlink/target.cmake from STREQUAL to IN_LIST, however as configure_linker_script() is a macro, then arguments are not variables in the CMake sense but string replacements, and therefore IN_LIST doesn't work directly on the argument.

Fix this by creating a true CMake list from the content of the argument and use this list for IN_LIST checking.

Signed-off-by: Torsten Rasmussen [email protected]

manoj153
manoj153

cmake: add ztest_suite_node output section to linker script generator

The commit dee79d2b66cc983f1fff345aaebed14b05600d85 introduced a new linker output section ztest_suite_node in linker/common-ram.ld but without updating the corresponding linker_script/common/common-ram.cmake linker script generator code.

This causes test cases for arm Compiler 6 to fail.

Add the same section to common-ram.ld.

Signed-off-by: Torsten Rasmussen [email protected]

manoj153
manoj153

cmake: improve the check of optimization level against CMAKE_BUILD_TYPE

Fixes: #39626

The CMAKE_C_FLAGS_<build_type> is a string with arguments separated by spaces and not a list, for example "-O3 -DNDEBUG".

Therefore update the if() check to do a regex match to determine if the optimization level specified through Kconfig matches the optimization level that would be defined by the CMAKE_BUILD_TYPE setting.

Signed-off-by: Torsten Rasmussen [email protected]

manoj153
manoj153

drivers: can: shell: convert from can_attach_workq() to triggered work

Convert the CAN shell from using can_attach_workq() to using can_attach_msgq() and triggered work via k_work_poll_submit().

Signed-off-by: Henrik Brix Andersen [email protected]

manoj153
manoj153

samples: drivers: can: convert from can_attach_workq() to triggered work

Convert the CAN sample from using can_attach_workq() to using can_attach_msgq() and triggered work via k_work_poll_submit().

Signed-off-by: Henrik Brix Andersen [email protected]

manoj153
manoj153

tests: drivers: can: api: remove can_attach_workq() tests

Remove the tests for can_attach_workq() and convert the test_send_receive_buffer() test case to using a message queue.

Signed-off-by: Henrik Brix Andersen [email protected]

manoj153
manoj153

tests: drivers: can: fd: remove can_attach_workq() tests

Remove the tests for can_attach_workq().

Signed-off-by: Henrik Brix Andersen [email protected]

manoj153
manoj153

drivers: can: deprecate the can_attach_workq() API call

Deprecate the can_attach_workq() API call.

This API is limited in its functionality (it does not work with userspace, it uses one common buffer size for all work queue instances).

Similar functionality can easily be implemented using the can_attach_msgq() API along with the generic triggered work API (e.g. using k_work_poll_submit()).

Signed-off-by: Henrik Brix Andersen [email protected]

manoj153
manoj153

dts: bindings: adc: microchip: Introduced clk_time field

Added clk_time field to configure Microchip ADC config register. This allows programming ADC_CLK_HIGH_TIME & ADC_CLK_LOW_TIME register values.

Signed-off-by: Aditya Bhutada [email protected]

manoj153
manoj153

drivers: adc: adc_mchp_xec: update configuration register clk times

MCHP ADC configuration register need to be updated with appropriate clock time values for high & low time clock.

Signed-off-by: Aditya Bhutada [email protected]

commit sha: 2292170a6c9b01ec439761c5a15ce5e41b39325f

push time in 2 weeks ago
Jan
4
2 weeks ago
Activity icon
created branch

manoj153 in pingspace/zephyr create branch v2.7

createdAt 2 weeks ago
Activity icon
created branch

manoj153 in pingspace/zephyr create branch main

createdAt 2 weeks ago
push

manoj153 push manoj153/zephyr

manoj153
manoj153

drivers: spi_sam0: initialize all cs gpios during init

In case when we have multiple devices connected to the one SPI interface the initial state of CS gpios after MCU reset is floating and it might be low that prevents us from communicating between particular devices. Fix that by initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas [email protected]

manoj153
manoj153

drivers: spi_sifive: initialize all cs gpios during init

In case when we have multiple devices connected to the one SPI interface the initial state of CS gpios after MCU reset is floating and it might be low that prevents us from communicating between particular devices. Fix that by initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas [email protected]

manoj153
manoj153

drivers: spi_xec_qmspi: initialize all cs gpios during init

In case when we have multiple devices connected to the one SPI interface the initial state of CS gpios after MCU reset is floating and it might be low that prevents us from communicating between particular devices. Fix that by initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas [email protected]

manoj153
manoj153

drivers: spi_xlnx_axi_quadspi: initialize all cs gpios during init

In case when we have multiple devices connected to the one SPI interface the initial state of CS gpios after MCU reset is floating and it might be low that prevents us from communicating between particular devices. Fix that by initializing all provided cs gpios and setting them as inactive.

Signed-off-by: Bartosz Bilas [email protected]

manoj153
manoj153

drivers: spi: remove spi_context_cs_configure function

Since cs gpios are initialized during driver initialization remove spi_context_cs_configure that is not longer need.

Signed-off-by: Bartosz Bilas [email protected]

manoj153
manoj153

dts/arm: stm32u5: add usb OTG full-speed node

Add the USB On-The-Go Supplement, Revision 2.0 in the DTS of the stm32u575 and stm32u585 devices (not for the stm32U5 serie).

Signed-off-by: Francois Ramu [email protected]

manoj153
manoj153

boards: arm: stm32 disco kit target board has USB-OTG instance

This commit enables the USB OTG full-speed instance (OTG) on the target board b_u585i_iot02a from STMicroelectronics. OTG is available on USB type-C connector (CN1).

Signed-off-by: Francois Ramu [email protected]

manoj153
manoj153

drivers: usb device driver for the stm32u5 soc family

This commit enables the HSI48 clock for the stm32U5 soc family to use the USB device peripheral. Enable the VDD USB voltage supply.

Signed-off-by: Francois Ramu [email protected]

manoj153
manoj153

doc: doxygen: add group definition file

Add an external group definition file. It can be used to create high level group for things like subsystems, as there is no header such as "subsys.h" where these type of logical groups can be defined.

This approach is followed by projects such as pipewire to organize Doxygen modules.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: cleanup Doxygen groups and inclusion

  • Add a new subsys_pm group, part of subsys
  • Improve group naming
  • Include conditional code using DOXYGEN, it allows to have better control of inclusion.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: state: use code/endcode for code examples

Enclode code examples using code/endcode Doxygen commands.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: document deprecated functions and macros

Document the deprecated functions and macros, tag them with @deprecated command to inform about the replacement.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: remove unused flag

PM_DEVICE_FLAG_COUNT is not used, so remove it.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: adjust flag names

Some flags were using FLAGS instead of FLAG.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: hide internal flags from public docs

The PM flags are only used internally, so there is no need to include them in the documentation.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: remove internal comment

The comment provides internal details which are not relevant.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: improve pm_device_busy* APIs docs

Make the API docs more concise.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: add dummy implementation for wakeup API

Add a dummy implementation for the wakeup API, so that it can still be used when no PM_DEVICE is enabled.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: improve wakeup API docs

Improve the Doxygen docs for the pm_device_wakeup* APIs.

Signed-off-by: Gerard Marull-Paretas [email protected]

manoj153
manoj153

pm: device: hide struct pm_device from docs

This structure is meant for internal usage, same as its initializer.

Signed-off-by: Gerard Marull-Paretas [email protected]

commit sha: af79664da3debec8d168e01dac6098dac88841cf

push time in 2 weeks ago
Dec
23
1 month ago
open pull request

manoj153 wants to merge zephyrproject-rtos/hal_stm32

manoj153
manoj153

stm32u5 octo-spi interface

configure the HAL octospi of the stm32u5xx cube

required by the flash_stm32_ospi.c driver https://github.com/zephyrproject-rtos/zephyr/pull/39771

Signed-off-by: Francois Ramu [email protected]

manoj153
manoj153

Mind to tell if this is something auto-generated or manually typed?

I plan to test octo-spi and refine for stm32h723xx

pull request

manoj153 merge to zephyrproject-rtos/hal_stm32

manoj153
manoj153

stm32u5 octo-spi interface

configure the HAL octospi of the stm32u5xx cube

required by the flash_stm32_ospi.c driver https://github.com/zephyrproject-rtos/zephyr/pull/39771

Signed-off-by: Francois Ramu [email protected]

Dec
22
1 month ago
pull request

manoj153 merge to zephyrproject-rtos/zephyr

manoj153
manoj153

octospi driver for stm32 mcus

This PR adds the support of the OCTOSPI peripheral and driver on the stm32 devices

A new Kconfig is defined to enable this new driver for accessing the flash spi memories The new stm32 flash driver for octospi is similar to the quadspi. A sample application is also included here to test the driver. In this configuration, only the second instance (octospi2) is enabled, The driver is not yet designed for multi-instance.

ospi init completed ! SFDP wrong value

Signed-off-by: Francois Ramu [email protected]

open pull request

manoj153 wants to merge zephyrproject-rtos/zephyr

manoj153
manoj153

octospi driver for stm32 mcus

This PR adds the support of the OCTOSPI peripheral and driver on the stm32 devices

A new Kconfig is defined to enable this new driver for accessing the flash spi memories The new stm32 flash driver for octospi is similar to the quadspi. A sample application is also included here to test the driver. In this configuration, only the second instance (octospi2) is enabled, The driver is not yet designed for multi-instance.

ospi init completed ! SFDP wrong value

Signed-off-by: Francois Ramu [email protected]

manoj153
manoj153

Clock related stuff is supposed to be here, or is it just here for quick testing?

push

manoj153 push manoj153/zephyr

manoj153
manoj153

dts: arm: st: h7a3: add support for stm32h7a3

Introduce device tree support for this family of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xx support

Basic kconfig config.

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

drivers: clock_control: stm32h7: Support SoC STM32H7A3XX clock requirement

Introduce a new group of clock setting to fit in this series of SoC

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: kconfig workaround to handle SoC H7A3XX-Q P/N

Set the correct soc string so that the correct CMSIS file is being utilised.

Signed-off-by: Manojkumar Subramaniam [email protected]ectrolance.com

manoj153
manoj153

tests: drivers: STM32: Enabling ADC tests for nucleo_h7a3zi_q

This commit enables test_adc to build and run for this new board

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

samples: drivers: nucleo_h7a3zi_q: Configuring ADC sample application

I tested ADC sample on the board mentioned above 0v = 0 3.3v = 4095

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

soc: arm: stm32h7: add stm32h7a3xxq

The Q variant is the same as non-Q, except the Q has SMPS built-in. This symbol addition is to have the correct SOC definition in the board configs

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: Add support for nucleo_h7a3zi_q

Introduce this board, rcc config: the SoC uses slightly different domain naming, eg: cdppre is equivalent to d1ppre D1 = CD D2 = CD<..>2 D3 = SRD

Signed-off-by: Manojkumar Subramaniam [email protected]

manoj153
manoj153

boards: nucleo h7a3zi-q: enable SMPS

SMPS supply is default for this board

Signed-off-by: Manojkumar Subramaniam [email protected]

commit sha: f85777d659030e8f5239d65aa73e61c3e40aaf8d

push time in 1 month ago
open pull request

manoj153 wants to merge zephyrproject-rtos/zephyr

manoj153
manoj153

@erwango I made all the changes as your request, but please note we have a build warning consequently build error,

The reason is the way we select SOC_STM32H7A3XX from SOC_STM32H7A3XXQ. So what should we do?

warning: the choice symbol SOC_STM32H7A3XX (defined at soc/arm/st_stm32/stm32h7/Kconfig.soc:45) is selected by the following symbols, but select/imply has no effect on choice symbols
 - SOC_STM32H7A3XXQ (defined at soc/arm/st_stm32/stm32h7/Kconfig.soc:50)

error: Aborting due to Kconfig warnings
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