tarek-bochkati

tarek-bochkati

Member Since 8 years ago

STMicroelectronics, Tunisia

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244 contributions in the last year

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⚡ My OpenOCD sandbox, things to be up-streamed hopefully
⚡ STMicroelectronics customized version of OpenOCD
⚡ Official OpenOCD Read-Only Mirror (no pull requests)
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Sep
27
3 weeks ago
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tarek-bochkati push tarek-bochkati/openocd

tarek-bochkati
tarek-bochkati

flash/nor/xcf: Do not use 'Yoda conditions'

Change-Id: I17308f5237338ce468e5b86289a0634429deaaa9 Signed-off-by: Marc Schink [email protected] Reviewed-on: http://openocd.zylin.com/6201 Tested-by: jenkins Reviewed-by: Tomas Vanek [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

cortex_m: add armv8m special registers

Change-Id: I1942f375a5f4282ad1fe4a2ff3b8f3cbc64d8f7f Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/6016 Tested-by: jenkins Reviewed-by: Tomas Vanek [email protected]

tarek-bochkati
tarek-bochkati

rtos: Add support for Zephyr RTOS

With this patch, the Zephyr[1] RTOS is supported by OpenOCD.

As usual with support for other RTOSes, Zephyr must be compiled with the DEBUG_THREAD_INFO option. This will generate some symbols with information needed in order to build the list of threads.

The current implementation is limited to Zephyr running on ARM Cortex-M processors. This is the only ARM variant supported by Zephyr at the moment and is used on most of the officially supported boards.

[1] https://www.zephyrproject.org/

Change-Id: I22afdbec91562f3a22cf5b88cd4ea3a7a59ba0b4 Signed-off-by: Evgeniy Didin [email protected] Signed-off-by: Leandro Pereira [email protected] Signed-off-by: Daniel Glöckner [email protected] Reviewed-on: http://openocd.zylin.com/4988 Tested-by: jenkins Reviewed-by: Oleksij Rempel [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

target/armv7m.h: [style] replace tab with space between variable type and name

Change-Id: I9740c25857295a2a655d3046322a3f23f0ee7f78 Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/6230 Reviewed-by: Marc Schink [email protected] Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

server: gdb_server: Add colon for target extended-remote

Both GDB commands "target remote" and "target extended-remote" require to have ":" right before port number.

e.g. (gdb) target extended-remote :3333

Add ":" to the warning message so that users can copy & past it.

Change-Id: Id6d8ec1e4dfd3c12cb7f3b314064f2c35fa7ab55 Signed-off-by: Yasushi SHOJI [email protected] Reviewed-on: http://openocd.zylin.com/6237 Reviewed-by: Tarek BOCHKATI [email protected] Tested-by: jenkins Reviewed-by: Marc Schink [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

jimtcl: restrict memory leak workaround on Linux only

The workaround for jimtcl 0.80 in commit 36ae487ed04b ("jimtcl: add temporary workaround for memory leak in jimtcl 0.80") issues a compile time error on macOS: ../src/helper/command.c:157:22: error: aliases are not supported on darwin attribute((weak, alias("workaround_createcommand"))); The OS is x86_64-apple-darwin19.6.0 and the compiler used is x86_64-apple-darwin13.4.0-clang.

Restrict the workaround on Linux host only. The fix for 'expr' syntax change is already merged and the workaround will be dropped soon.

Change-Id: I925109a9c57c05f8c95b70bc7d6604eb1172cd79 Signed-off-by: Antonio Borneo [email protected] Reported-by: Adam Jeliński [email protected] Fixes: 36ae487ed04b ("jimtcl: add temporary workaround for memory leak in jimtcl 0.80") Fixes: https://sourceforge.net/p/openocd/tickets/304/ Reviewed-on: http://openocd.zylin.com/6241 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

target/armv7m: fix static analyzer warning

Despite of assert(is_packed) clang static analyser complains on use of the uninitialized offset variable.

Cross compiling with latest x86_64-w64-mingw32-gcc hits warnings src/target/armv7m.c: In function ‘armv7m_read_core_reg’: src/target/armv7m.c:337:54: error: ‘reg32_id’ may be used uninitialized in this function [-Werror=maybe-uninitialized]

It happens because mingw32 defines assert() without the attribute "noreturn", whatever NDEBUG is defined or not.

Replace assert(is_packed) by if (is_packed) conditional and call assert(false) in the else branch.

Change-Id: Id3c7dcccb65106e28be200b9a4d2b642f4d31019 Signed-off-by: Tomas Vanek [email protected] Reviewed-on: http://openocd.zylin.com/6256 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected] Reviewed-by: Tarek BOCHKATI [email protected] Reviewed-by: Andrzej Sierżęga [email protected]

tarek-bochkati
tarek-bochkati

cmsis_dap: fix build on macOS

Compile fails with error: src/jtag/drivers/cmsis_dap.c:683:28: error: format specifies type 'unsigned char' but the argument has type 'int' [-Werror,-Wformat] " received 0x%" PRIx8, CMD_DAP_TFER, resp[0]); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~^

Fix the format specifier.

Change-Id: I0a5a1a35452d634019989d14d849501fb8a7e93a Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6255 Tested-by: jenkins Reviewed-by: Tomas Vanek [email protected]

tarek-bochkati
tarek-bochkati

cortex_m: do not perform soft_reset_halt on targets without VECTRESET

Change-Id: Ib3df457e0afe4e342c82ad1af25e03aad6979d87 Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/6209 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected] Reviewed-by: Tomas Vanek [email protected]

tarek-bochkati
tarek-bochkati

cortex_m: fix VECTRESET detection for ARMv6-M cores

VECTRESET check should be done after verifying if the core is an ARMv6-M core, and not before that.

Fixes: 2dc9c1df81b6 ("cortex_m: [FIX] ARMv8-M does not support VECTRESET") Change-Id: I8306affd332b3a35cea69bba39ef24ca71244273 Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/6232 Tested-by: jenkins Reviewed-by: Tomas Vanek [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

target/arm_dpm: rename 'wp_pc' as 'wp_addr'

The field 'wp_pc' was originally introduced in commit 55eeea7fceb6 ("ARMv7a/Cortex-A8: report watchpoint trigger insn") in end 2009 to contain the address of the instruction which triggered a watchpoint. Later on with commit 651b861d5d5f ("target/aarch64: Add watchpoint support") it has been reused in to hold directly the memory address that triggered a watchpoint.

Rename 'wp_pc' as 'wp_addr' and change its doxygen description. While there, fix the format string to print the field.

Change-Id: I2e5ced1497e4a6fb6b38f91e881807512e8d8c47 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6204 Tested-by: jenkins Reviewed-by: Liming Sun [email protected]

tarek-bochkati
tarek-bochkati

target/aarch64: fix watchpoint management

The early documentation for armv8a report the debug register WFAR as containing the address of the instruction that triggered the watchpoint. More recent documentation report the register EDWAR as containing the data memory address that triggered the watchpoint.

The name of macros CPUV8_DBG_WFAR0 and CPUV8_DBG_WFAR1 is not correct as they point to the debug register EDWAR, so reading such register returns directly the data memory address that triggered the watchpoint. The code incorrectly passes this address value to the function armv8_dpm_report_wfar(); this function is supposed to adjust the PC value, decrementing it to remove the effects of the CPU pipeline. This pipeline offset, that has no meaning on the value in EDWAR, caused commit 651b861d5d5f ("target/aarch64: Add watchpoint support") to add back the offset while comparing the address with the watchpoint enabled.

The upper 32 bits of EDWAR are not valid in aarch32 mode and have to be ignored.

Rename CPUV8_DBG_WFAR0/1 as CPUV8_DBG_EDWAR0/1. Remove the function armv8_dpm_report_wfar(). Remove the offset while searching the matching watchpoint. Ignore the upper 32 bits of EDWAR in aarch32 mode. Fix a comment and the LOG text.

Change-Id: I7cbdbeb766fa18e31cc72be098ca2bc501877ed1 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6205 Tested-by: jenkins Reviewed-by: Liming Sun [email protected]

tarek-bochkati
tarek-bochkati

flash/stm32l4x: add missing break statement

this is not a bug fix, this for loop will issue only one match adding the break will save unnecessary more loops.

Change-Id: Ic1484ea8cdea1b284eb570f9e3e7818e07daf5cd Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/6248 Reviewed-by: Oleksij Rempel [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

github/action: create a permanent 'latest' release

this commit extends the existing snapshot action to create a release named 'latest' with the built binaries for windows.

this 'latest' release will be updated after every push to github.

Change-Id: I75a64c598169241743add3ac9aa7a0337fbab7f2 Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/6127 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

tcl/rp2040: remove empty line at end of file

Change-Id: I212a96b77282b151a8ecbd46a6436e2bbbda4161 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6221 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

tcl: fix some minor typo

Minor typos found by the new checkpatch boosted by the dictionary provided by 'codespell'. While there, fix one indentation.

Change-Id: I72369ed26f363bacd760b40b8c83dd95e89d28a4 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6214 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

flash: fix some minor typo

Minor typos found by the new checkpatch boosted by the dictionary provided by 'codespell'.

Change-Id: Ia5f134c91beb483fd865df9e4877e0ec3e789478 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6215 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

jtag: fix some minor typo

Minor typos found by the new checkpatch boosted by the dictionary provided by 'codespell'.

Change-Id: I101c76a638805d77c1ff356cf0f027552389e5d3 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6216 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

target: fix some minor typo

Minor typos found by the new checkpatch boosted by the dictionary provided by 'codespell'.

Change-Id: I548581247db72e683249749d1b8725035530b06e Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6217 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

openocd: fix some minor typo

Minor typos found by the new checkpatch boosted by the dictionary provided by 'codespell'.

Change-Id: I7b4cae1798ff5ea048fcbc671a397af763fdc605 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6218 Tested-by: jenkins

commit sha: c3993d3188da5976a64f47d4cbf4d7e5b63f0c8d

push time in 3 weeks ago
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issue

tarek-bochkati issue STMicroelectronics/OpenOCD

tarek-bochkati
tarek-bochkati

Segfault when trying to connect to target stm32wlx

I have an stlink-v2 hooked up to a newly designed PCB with an stm32wl55ccu7 but can't seem get OpenOCD working. It connects to the target but as soon as I try to connect with gdb, it segfaults due to a null pointer.

EDIT: I have also tried it out with a nucleo wl55jc1 with an stlink-v3 adapter, same error.

Any ideas?

~$ uname -a Linux 32k 4.15.0-51-generic #55-Ubuntu SMP Wed May 15 14:27:21 UTC 2019 x86_64 x86_64 x86_64 GNU/Linux

~/OpenOCD $ > git rev-parse --short HEAD ff701ce82

Reading symbols from openocd...done. (gdb) run Starting program: /usr/local/bin/openocd -d3 -f interface/stlink.cfg -f target/stm32wlx.cfg [Thread debugging using libthread_db enabled] Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1". Open On-Chip Debugger 0.11.0-rc2+dev-00039-gff701ce82-dirty (2021-08-25-16:35) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html User : 13 1 options.c:63 configuration_output_handler(): debug_level: 3 User : 14 1 options.c:63 configuration_output_handler(): Debug: 15 1 options.c:244 add_default_dirs(): bindir=/usr/local/bin Debug: 16 1 options.c:245 add_default_dirs(): pkgdatadir=/usr/local/share/openocd Debug: 17 1 options.c:246 add_default_dirs(): exepath=/usr/local/bin Debug: 18 1 options.c:247 add_default_dirs(): bin2data=../share/openocd Debug: 19 1 configuration.c:42 add_script_search_dir(): adding /home/manne/.config/openocd Debug: 20 1 configuration.c:42 add_script_search_dir(): adding /home/manne/.openocd Debug: 21 1 configuration.c:42 add_script_search_dir(): adding /usr/local/bin/../share/openocd/site Debug: 22 1 configuration.c:42 add_script_search_dir(): adding /usr/local/bin/../share/openocd/scripts Debug: 23 1 configuration.c:97 find_file(): found /usr/local/bin/../share/openocd/scripts/interface/stlink.cfg Debug: 24 1 command.c:146 script_debug(): command - adapter driver hla Debug: 26 1 command.c:146 script_debug(): command - hla_layout stlink Debug: 28 1 hla_interface.c:242 hl_interface_handle_layout_command(): hl_interface_handle_layout_command Debug: 29 1 command.c:146 script_debug(): command - hla_device_desc ST-LINK Debug: 31 1 hla_interface.c:216 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command Debug: 32 1 command.c:146 script_debug(): command - hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 Debug: 34 1 configuration.c:97 find_file(): found /usr/local/bin/../share/openocd/scripts/target/stm32wlx.cfg Debug: 35 1 configuration.c:97 find_file(): found /usr/local/bin/../share/openocd/scripts/target/swj-dp.tcl Debug: 36 1 command.c:146 script_debug(): command - transport select Info : 37 1 transport.c:276 jim_transport_select(): auto-selecting first available session transport "hla_swd". To override use 'transport select '. Debug: 38 1 hla_transport.c:205 hl_swd_transport_select(): hl_swd_transport_select Debug: 39 1 configuration.c:97 find_file(): found /usr/local/bin/../share/openocd/scripts/mem_helper.tcl Debug: 40 1 command.c:146 script_debug(): command - add_usage_text mrw address Debug: 42 1 command.c:1115 help_add_command(): added 'mrw' help text Debug: 43 1 command.c:146 script_debug(): command - add_help_text mrw Returns value of word in memory. Debug: 45 1 command.c:1128 help_add_command(): added 'mrw' help text Debug: 46 1 command.c:146 script_debug(): command - add_usage_text mrh address Debug: 48 1 command.c:1115 help_add_command(): added 'mrh' help text Debug: 49 1 command.c:146 script_debug(): command - add_help_text mrh Returns value of halfword in memory. Debug: 51 1 command.c:1128 help_add_command(): added 'mrh' help text Debug: 52 1 command.c:146 script_debug(): command - add_usage_text mrb address Debug: 54 1 command.c:1115 help_add_command(): added 'mrb' help text Debug: 55 1 command.c:146 script_debug(): command - add_help_text mrb Returns value of byte in memory. Debug: 57 1 command.c:1128 help_add_command(): added 'mrb' help text Debug: 58 1 command.c:146 script_debug(): command - add_usage_text mmw address setbits clearbits Debug: 60 1 command.c:1115 help_add_command(): added 'mmw' help text Debug: 61 1 command.c:146 script_debug(): command - add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits; Debug: 63 1 command.c:1128 help_add_command(): added 'mmw' help text Debug: 64 1 command.c:146 script_debug(): command - transport select Debug: 65 1 command.c:146 script_debug(): command - transport select Debug: 66 1 command.c:146 script_debug(): command - transport select Debug: 67 1 command.c:146 script_debug(): command - swd newdap stm32wlx cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x6ba02477 Debug: 68 1 hla_tcl.c:111 jim_hl_newtap_cmd(): Creating New Tap, Chip: stm32wlx, Tap: cpu, Dotted: stm32wlx.cpu, 8 params Debug: 69 1 hla_tcl.c:121 jim_hl_newtap_cmd(): Processing option: -irlen Debug: 70 1 hla_tcl.c:121 jim_hl_newtap_cmd(): Processing option: -ircapture Debug: 71 1 hla_tcl.c:121 jim_hl_newtap_cmd(): Processing option: -irmask Debug: 72 1 hla_tcl.c:121 jim_hl_newtap_cmd(): Processing option: -expected-id Debug: 73 1 core.c:1488 jtag_tap_init(): Created Tap: stm32wlx.cpu @abs position 0, irlen 0, capture: 0x0 mask: 0x0 Debug: 74 1 command.c:146 script_debug(): command - dap create stm32wlx.dap -chain-position stm32wlx.cpu Debug: 75 1 command.c:146 script_debug(): command - transport select Debug: 76 1 command.c:146 script_debug(): command - target create stm32wlx.m4 cortex_m -endian little -dap stm32wlx.dap Info : 77 1 target.c:5657 target_create(): The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD Debug: 78 1 hla_target.c:203 adapter_target_create(): adapter_target_create Debug: 79 1 hla_target.c:173 adapter_init_arch_info(): adapter_init_arch_info Debug: 80 1 command.c:376 register_command(): command 'tpiu' is already registered in '' context Debug: 81 1 command.c:376 register_command(): command 'rtt' is already registered in '' context Debug: 82 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -work-area-phys 0x20008000 -work-area-size 0x2000 -work-area-backup 0 Debug: 83 1 target.c:2161 target_free_all_working_areas_restore(): freeing all working areas Debug: 84 1 target.c:2161 target_free_all_working_areas_restore(): freeing all working areas Debug: 85 1 target.c:2161 target_free_all_working_areas_restore(): freeing all working areas Debug: 86 1 command.c:146 script_debug(): command - flash bank stm32wlx.flash.m4 stm32l4x 0x08000000 0 0 0 stm32wlx.m4 Debug: 88 1 tcl.c:1319 handle_flash_bank_command(): 'stm32l4x' driver usage field missing Debug: 89 1 command.c:146 script_debug(): command - flash bank stm32wlx.otp.m4 stm32l4x 0x1fff7000 0 0 0 stm32wlx.m4 Debug: 91 1 command.c:376 register_command(): command 'stm32l4x' is already registered in '' context Debug: 92 1 command.c:376 register_command(): command 'lock' is already registered in 'stm32l4x' context Debug: 93 1 command.c:376 register_command(): command 'unlock' is already registered in 'stm32l4x' context Debug: 94 1 command.c:376 register_command(): command 'mass_erase' is already registered in 'stm32l4x' context Debug: 95 1 command.c:376 register_command(): command 'option_read' is already registered in 'stm32l4x' context Debug: 96 1 command.c:376 register_command(): command 'option_write' is already registered in 'stm32l4x' context Debug: 97 1 command.c:376 register_command(): command 'trustzone' is already registered in 'stm32l4x' context Debug: 98 1 command.c:376 register_command(): command 'wrp_desc' is already registered in 'stm32l4x' context Debug: 99 1 command.c:376 register_command(): command 'option_load' is already registered in 'stm32l4x' context Debug: 100 1 command.c:376 register_command(): command 'otp' is already registered in 'stm32l4x' context Debug: 101 1 tcl.c:1319 handle_flash_bank_command(): 'stm32l4x' driver usage field missing Debug: 102 1 command.c:146 script_debug(): command - targets stm32wlx.m4 Debug: 104 1 command.c:146 script_debug(): command - adapter speed 500 Debug: 106 1 core.c:1822 jtag_config_khz(): handle jtag khz Debug: 107 1 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 108 1 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 109 1 command.c:146 script_debug(): command - adapter srst delay 100 Debug: 111 1 command.c:146 script_debug(): command - transport select Debug: 112 1 command.c:146 script_debug(): command - reset_config srst_nogate Debug: 114 1 command.c:146 script_debug(): command - transport select Debug: 115 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event reset-init #4 MHz. #24 MHz clock, compliant with VOS default Range1. #2 WS compliant with VOS=Range1 and 24 MHz. mmw 0x58004000 0x00000102 0 ;#2(Latency) mmw 0x58000000 0x00000091 0 ;#24 MHz #4000

Debug: 116 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event reset-start #4 MHz) adapter speed 500

Debug: 117 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event examine-end global _DUALCORE global _CHIPNAME

# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0

# Stop watchdog counters during halt
# DBGMCU_APB1_FZR1 |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE004203C 0x00001800 0

if { [set _DUALCORE] } {
	targets $_CHIPNAME.m4

	# enable CPU2 boot after reset and after wakeup from Stop or Standby mode
	# PWR_CR4 |= C2BOOT
	mmw 0x5800040C 0x00008000 0
}

Debug: 118 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event trace-config # nothing to do

Info : 119 1 server.c:312 add_service(): Listening on port 6666 for tcl connections Info : 120 1 server.c:312 add_service(): Listening on port 4444 for telnet connections Debug: 121 1 command.c:146 script_debug(): command - init Debug: 123 1 command.c:146 script_debug(): command - target init Debug: 125 1 command.c:146 script_debug(): command - target names Debug: 126 1 command.c:146 script_debug(): command - stm32wlx.m4 cget -event gdb-flash-erase-start Debug: 127 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event gdb-flash-erase-start reset init Debug: 128 1 command.c:146 script_debug(): command - stm32wlx.m4 cget -event gdb-flash-write-end Debug: 129 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event gdb-flash-write-end reset halt Debug: 130 1 command.c:146 script_debug(): command - stm32wlx.m4 cget -event gdb-attach Debug: 131 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event gdb-attach halt 1000 Debug: 132 1 target.c:1628 handle_target_init_command(): Initializing targets... Debug: 133 1 hla_target.c:193 adapter_init_target(): adapter_init_target Debug: 134 1 semihosting_common.c:99 semihosting_common_init():
Debug: 135 2 hla_interface.c:109 hl_interface_init(): hl_interface_init Debug: 136 2 hla_layout.c:95 hl_layout_init(): hl_layout_init Debug: 137 2 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 138 2 core.c:1789 adapter_khz_to_speed(): have interface set up Debug: 139 2 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 140 2 core.c:1789 adapter_khz_to_speed(): have interface set up Info : 141 2 core.c:1565 adapter_init(): clock speed 500 kHz Debug: 142 2 openocd.c:144 handle_init_command(): Debug Adapter init complete Debug: 143 2 command.c:146 script_debug(): command - transport init Debug: 145 2 transport.c:229 handle_transport_init(): handle_transport_init Debug: 146 2 hla_transport.c:156 hl_transport_init(): hl_transport_init Debug: 147 2 hla_transport.c:173 hl_transport_init(): current transport hla_swd Debug: 148 2 hla_interface.c:42 hl_interface_open(): hl_interface_open Debug: 149 2 hla_layout.c:40 hl_layout_open(): hl_layout_open Debug: 150 2 stlink_usb.c:3542 stlink_open(): stlink_open Debug: 151 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3744 serial: Debug: 152 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3748 serial: Debug: 153 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374b serial: Debug: 154 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374d serial: Debug: 155 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374e serial: Debug: 156 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374f serial: Debug: 157 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3752 serial: Debug: 158 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3753 serial: [New Thread 0x7ffff6743700 (LWP 20785)] Info : 159 4 stlink_usb.c:1346 stlink_usb_version(): STLINK V2J29S7 (API v2) VID:PID 0483:3748 Debug: 160 4 stlink_usb.c:1567 stlink_usb_exit_mode(): MODE: 0x02 Info : 161 5 stlink_usb.c:1378 stlink_usb_check_voltage(): Target voltage: 3.151562 Debug: 162 5 stlink_usb.c:1635 stlink_usb_init_mode(): MODE: 0x01 Debug: 163 5 stlink_usb.c:2956 stlink_dump_speed_map(): Supported clock speeds are: Debug: 164 5 stlink_usb.c:2959 stlink_dump_speed_map(): 4000 kHz Debug: 165 5 stlink_usb.c:2959 stlink_dump_speed_map(): 1800 kHz Debug: 166 5 stlink_usb.c:2959 stlink_dump_speed_map(): 1200 kHz Debug: 167 5 stlink_usb.c:2959 stlink_dump_speed_map(): 950 kHz Debug: 168 5 stlink_usb.c:2959 stlink_dump_speed_map(): 480 kHz Debug: 169 5 stlink_usb.c:2959 stlink_dump_speed_map(): 240 kHz Debug: 170 5 stlink_usb.c:2959 stlink_dump_speed_map(): 125 kHz Debug: 171 5 stlink_usb.c:2959 stlink_dump_speed_map(): 100 kHz Debug: 172 5 stlink_usb.c:2959 stlink_dump_speed_map(): 50 kHz Debug: 173 5 stlink_usb.c:2959 stlink_dump_speed_map(): 25 kHz Debug: 174 5 stlink_usb.c:2959 stlink_dump_speed_map(): 15 kHz Debug: 175 5 stlink_usb.c:2959 stlink_dump_speed_map(): 5 kHz Debug: 176 8 stlink_usb.c:1694 stlink_usb_init_mode(): MODE: 0x02 Debug: 177 8 stlink_usb.c:3886 stlink_usb_open_ap(): AP 0 enabled Debug: 178 9 stlink_usb.c:3629 stlink_open(): Using TAR autoincrement: 4096 Debug: 179 9 core.c:640 adapter_system_reset(): SRST line released Debug: 180 111 hla_interface.c:67 hl_interface_init_target(): hl_interface_init_target Debug: 181 111 stlink_usb.c:1927 stlink_usb_idcode(): IDCODE: 0x6BA02477 Debug: 182 111 command.c:146 script_debug(): command - dap init Debug: 184 111 arm_dap.c:106 dap_init_all(): Initializing all DAPs ... Debug: 185 111 openocd.c:161 handle_init_command(): Examining targets... Debug: 186 111 target.c:1816 target_call_event_callbacks(): target event 19 (examine-start) for core stm32wlx.m4 Debug: 187 111 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1 Debug: 188 112 target.c:2578 target_read_u32(): address: 0xe000ed00, value: 0x410fc241 Debug: 189 112 cortex_m.c:2039 cortex_m_examine(): Cortex-M4 r0p1 processor detected Debug: 190 112 cortex_m.c:2050 cortex_m_examine(): cpuid: 0x410fc241 Debug: 191 112 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000ef40 4 1 Debug: 192 113 target.c:2578 target_read_u32(): address: 0xe000ef40, value: 0x00000000 Debug: 193 113 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000ef44 4 1 Debug: 194 113 target.c:2578 target_read_u32(): address: 0xe000ef44, value: 0x00000000 Debug: 195 113 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000edf0 4 1 Debug: 196 114 target.c:2578 target_read_u32(): address: 0xe000edf0, value: 0x00030003 Debug: 197 114 target.c:2666 target_write_u32(): address: 0xe000edfc, value: 0x01000000 Debug: 198 114 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1 Debug: 199 115 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1 Debug: 200 116 target.c:2578 target_read_u32(): address: 0xe0002000, value: 0x00000260 Debug: 201 116 target.c:2666 target_write_u32(): address: 0xe0002008, value: 0x00000000 Debug: 202 116 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1 Debug: 203 117 target.c:2666 target_write_u32(): address: 0xe000200c, value: 0x00000000 Debug: 204 117 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1 Debug: 205 117 target.c:2666 target_write_u32(): address: 0xe0002010, value: 0x00000000 Debug: 206 117 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1 Debug: 207 118 target.c:2666 target_write_u32(): address: 0xe0002014, value: 0x00000000 Debug: 208 118 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1 Debug: 209 119 target.c:2666 target_write_u32(): address: 0xe0002018, value: 0x00000000 Debug: 210 119 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002018 4 1 Debug: 211 120 target.c:2666 target_write_u32(): address: 0xe000201c, value: 0x00000000 Debug: 212 120 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe000201c 4 1 Debug: 213 120 target.c:2666 target_write_u32(): address: 0xe0002020, value: 0x00000000 Debug: 214 120 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002020 4 1 Debug: 215 121 target.c:2666 target_write_u32(): address: 0xe0002024, value: 0x00000000 Debug: 216 121 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002024 4 1 Debug: 217 122 cortex_m.c:2150 cortex_m_examine(): FPB fpcr 0x260, numcode 6, numlit 2 Debug: 218 122 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1 Debug: 219 123 target.c:2578 target_read_u32(): address: 0xe0001000, value: 0x40000000 Debug: 220 123 cortex_m.c:1868 cortex_m_dwt_setup(): DWT_CTRL: 0x40000000 Debug: 221 123 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0001fbc 4 1 Debug: 222 124 target.c:2578 target_read_u32(): address: 0xe0001fbc, value: 0x00000000 Debug: 223 124 cortex_m.c:1875 cortex_m_dwt_setup(): DWT_DEVARCH: 0x0 Debug: 224 124 target.c:2666 target_write_u32(): address: 0xe0001028, value: 0x00000000 Debug: 225 124 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1 Debug: 226 124 target.c:2666 target_write_u32(): address: 0xe0001038, value: 0x00000000 Debug: 227 124 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1 Debug: 228 125 target.c:2666 target_write_u32(): address: 0xe0001048, value: 0x00000000 Debug: 229 125 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0001048 4 1 Debug: 230 126 target.c:2666 target_write_u32(): address: 0xe0001058, value: 0x00000000 Debug: 231 126 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0001058 4 1 Debug: 232 127 cortex_m.c:1924 cortex_m_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger Info : 233 127 cortex_m.c:2160 cortex_m_examine(): stm32wlx.m4: hardware has 6 breakpoints, 4 watchpoints Debug: 234 127 target.c:1816 target_call_event_callbacks(): target event 21 (examine-end) for core stm32wlx.m4 Debug: 235 127 target.c:4768 target_handle_event(): target(0): stm32wlx.m4 (hla_target) event: 21 (examine-end) action: global _DUALCORE global _CHIPNAME

# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0

# Stop watchdog counters during halt
# DBGMCU_APB1_FZR1 |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE004203C 0x00001800 0

if { [set _DUALCORE] } {
	targets $_CHIPNAME.m4

	# enable CPU2 boot after reset and after wakeup from Stop or Standby mode
	# PWR_CR4 |= C2BOOT
	mmw 0x5800040C 0x00008000 0
}

Debug: 236 127 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1 Debug: 237 128 command.c:146 script_debug(): command - mww 0xE0042004 7 Debug: 238 128 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1 Debug: 239 129 target.c:2578 target_read_u32(): address: 0xe000edf8, value: 0x00000000 Debug: 240 130 armv7m.c:371 armv7m_read_core_reg(): read r0 value 0x00001800 Debug: 241 131 armv7m.c:371 armv7m_read_core_reg(): read r1 value 0x00000000 Debug: 242 132 armv7m.c:371 armv7m_read_core_reg(): read r2 value 0x006000d0 Debug: 243 133 armv7m.c:371 armv7m_read_core_reg(): read r3 value 0x00d00000 Debug: 244 134 armv7m.c:371 armv7m_read_core_reg(): read r4 value 0x40020000 Debug: 245 134 armv7m.c:371 armv7m_read_core_reg(): read r5 value 0x58000038 Debug: 246 135 armv7m.c:371 armv7m_read_core_reg(): read r6 value 0x40013000 Debug: 247 136 armv7m.c:371 armv7m_read_core_reg(): read r7 value 0x00000000 Debug: 248 137 armv7m.c:371 armv7m_read_core_reg(): read r8 value 0x00000000 Debug: 249 138 armv7m.c:371 armv7m_read_core_reg(): read r9 value 0x00000000 Debug: 250 139 armv7m.c:371 armv7m_read_core_reg(): read r10 value 0x00000000 Debug: 251 140 armv7m.c:371 armv7m_read_core_reg(): read r11 value 0x00000000 Debug: 252 141 armv7m.c:371 armv7m_read_core_reg(): read r12 value 0x80000000 Debug: 253 141 armv7m.c:371 armv7m_read_core_reg(): read sp value 0x200014f0 Debug: 254 142 armv7m.c:371 armv7m_read_core_reg(): read lr value 0x1fff2b45 Debug: 255 143 armv7m.c:371 armv7m_read_core_reg(): read pc value 0x1fff246a Debug: 256 144 armv7m.c:371 armv7m_read_core_reg(): read xPSR value 0x41000000 Debug: 257 145 armv7m.c:371 armv7m_read_core_reg(): read msp value 0x200014f0 Debug: 258 146 armv7m.c:371 armv7m_read_core_reg(): read psp value 0x00000000 Debug: 259 147 armv7m.c:371 armv7m_read_core_reg(): read pmsk_bpri_fltmsk_ctrl value 0x00000000 Debug: 260 148 armv7m.c:371 armv7m_read_core_reg(): read msp_ns value 0x41000000 Debug: 261 148 armv7m.c:371 armv7m_read_core_reg(): read psp_ns value 0x200014f0 Debug: 262 149 armv7m.c:371 armv7m_read_core_reg(): read msp_s value 0x00000000 Debug: 263 150 armv7m.c:371 armv7m_read_core_reg(): read psp_s value 0x00000000 Debug: 264 151 armv7m.c:371 armv7m_read_core_reg(): read msplim_s value 0x00000000 Debug: 265 152 armv7m.c:371 armv7m_read_core_reg(): read psplim_s value 0x200014f0 Debug: 266 153 armv7m.c:371 armv7m_read_core_reg(): read msplim_ns value 0x00000000 Debug: 267 154 armv7m.c:371 armv7m_read_core_reg(): read psplim_ns value 0x00000000 Debug: 268 155 armv7m.c:371 armv7m_read_core_reg(): read pmsk_bpri_fltmsk_ctrl_s value 0x00000000 Debug: 269 155 armv7m.c:371 armv7m_read_core_reg(): read pmsk_bpri_fltmsk_ctrl_ns value 0x00000000 Debug: 270 157 armv7m.c:369 armv7m_read_core_reg(): read d0 value 0x0000000000000000 Debug: 271 159 armv7m.c:369 armv7m_read_core_reg(): read d1 value 0x0000000000000000 Debug: 272 161 armv7m.c:369 armv7m_read_core_reg(): read d2 value 0x0000000000000000 Debug: 273 162 armv7m.c:369 armv7m_read_core_reg(): read d3 value 0x0000000000000000 Debug: 274 164 armv7m.c:369 armv7m_read_core_reg(): read d4 value 0x0000000000000000 Debug: 275 166 armv7m.c:369 armv7m_read_core_reg(): read d5 value 0x0000000000000000 Debug: 276 167 armv7m.c:369 armv7m_read_core_reg(): read d6 value 0x0000000000000000 Debug: 277 169 armv7m.c:369 armv7m_read_core_reg(): read d7 value 0x0000000000000000 Debug: 278 171 armv7m.c:369 armv7m_read_core_reg(): read d8 value 0x0000000000000000 Debug: 279 173 armv7m.c:369 armv7m_read_core_reg(): read d9 value 0x0000000000000000 Debug: 280 174 armv7m.c:369 armv7m_read_core_reg(): read d10 value 0x0000000000000000 Debug: 281 176 armv7m.c:369 armv7m_read_core_reg(): read d11 value 0x0000000000000000 Debug: 282 178 armv7m.c:369 armv7m_read_core_reg(): read d12 value 0x0000000000000000 Debug: 283 180 armv7m.c:369 armv7m_read_core_reg(): read d13 value 0x0000000000000000 Debug: 284 181 armv7m.c:369 armv7m_read_core_reg(): read d14 value 0x0000000000000000 Debug: 285 183 armv7m.c:369 armv7m_read_core_reg(): read d15 value 0x0000000000000000 Debug: 286 184 armv7m.c:371 armv7m_read_core_reg(): read fpscr value 0x00000000 Debug: 287 185 hla_target.c:289 adapter_debug_entry(): entered debug state in core mode: Thread at PC 0x1fff246a, target->state: halted Debug: 288 185 target.c:1816 target_call_event_callbacks(): target event 0 (gdb-halt) for core stm32wlx.m4 Debug: 289 185 target.c:1816 target_call_event_callbacks(): target event 1 (halted) for core stm32wlx.m4 Debug: 290 185 hla_target.c:331 adapter_poll(): halted: PC: 0x1fff246a Debug: 292 185 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1 Debug: 293 186 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe004203c 4 1 Debug: 294 187 command.c:146 script_debug(): command - mww 0xE004203C 6144 Debug: 296 188 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe004203c 4 1 Debug: 297 189 command.c:146 script_debug(): command - flash init Debug: 299 190 tcl.c:1385 handle_flash_init_command(): Initializing flash devices... Debug: 300 190 command.c:146 script_debug(): command - nand init Debug: 302 190 tcl.c:498 handle_nand_init_command(): Initializing NAND devices... Debug: 303 191 command.c:146 script_debug(): command - pld init Debug: 305 191 pld.c:206 handle_pld_init_command(): Initializing PLDs... Debug: 306 191 command.c:146 script_debug(): command - tpiu init Info : 307 191 gdb_server.c:3503 gdb_target_start(): starting gdb server for stm32wlx.m4 on 3333 Info : 308 191 server.c:312 add_service(): Listening on port 3333 for gdb connections Info : 309 6059 server.c:100 add_connection(): accepting 'gdb' connection on tcp/3333 Debug: 310 6059 breakpoints.c:384 breakpoint_clear_target_internal(): Delete all breakpoints for target: stm32wlx.m4 Debug: 311 6059 breakpoints.c:524 watchpoint_clear_target(): Delete all watchpoints for target: stm32wlx.m4 Debug: 312 6059 target.c:1816 target_call_event_callbacks(): target event 22 (gdb-attach) for core stm32wlx.m4 Debug: 313 6059 target.c:4768 target_handle_event(): target(0): stm32wlx.m4 (hla_target) event: 22 (gdb-attach) action: halt 1000 Debug: 314 6059 command.c:146 script_debug(): command - halt 1000 Debug: 316 6060 target.c:3249 handle_halt_command(): - Debug: 317 6060 hla_target.c:418 adapter_halt(): adapter_halt Debug: 318 6060 hla_target.c:421 adapter_halt(): target was already halted Debug: 319 6060 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0042000 4 1 Debug: 320 6061 target.c:2578 target_read_u32(): address: 0xe0042000, value: 0x10016497 Info : 321 6061 stm32l4x.c:1643 stm32l4_probe(): device idcode = 0x10016497 (STM32WLEx/WL5x - Rev 1.1 : 0x1001) Debug: 322 6061 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0x58004020 4 1 Debug: 323 6062 target.c:2578 target_read_u32(): address: 0x58004020, value: 0x3ffff0aa Info : 324 6062 stm32l4x.c:1659 stm32l4_probe(): RDP level 0 (0xAA) Debug: 325 6062 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0x1fff75e0 2 1 Debug: 326 6063 target.c:2602 target_read_u16(): address: 0x1fff75e0, value: 0x0100 Info : 327 6063 stm32l4x.c:1702 stm32l4_probe(): flash size = 256kbytes

Thread 1 "openocd" received signal SIGSEGV, Segmentation fault. 0x00005555556b38e9 in stm32l4_probe (bank=0x555555c59390) at src/flash/nor/stm32l4x.c:1861 1861 if (armv7m->debug_ap->ap_num == 1) (gdb) bt #0 0x00005555556b38e9 in stm32l4_probe (bank=0x555555c59390) at src/flash/nor/stm32l4x.c:1861 #1 0x00005555556b3d78 in stm32l4_auto_probe (bank=0x555555c59390) at src/flash/nor/stm32l4x.c:1946 #2 0x00005555555f2597 in get_flash_bank_by_num (num=0, bank=0x7fffffffdde0) at src/flash/nor/core.c:299 #3 0x0000555555626a27 in gdb_new_connection (connection=0x555555c777e0) at src/server/gdb_server.c:1004 #4 0x000055555562e056 in add_connection (service=0x555555c73f80, cmd_ctx=0x555555c07260) at src/server/server.c:101 #5 0x000055555562f1ae in server_loop (command_context=0x555555c07260) at src/server/server.c:543 #6 0x00005555555ad3fd in openocd_thread (argc=6, argv=0x7fffffffe0e8, cmd_ctx=0x555555c07260) at src/openocd.c:318 #7 0x00005555555ad4fa in openocd_main (argc=6, argv=0x7fffffffe0e8) at src/openocd.c:360 #8 0x00005555555acda6 in main (argc=6, argv=0x7fffffffe0e8) at src/main.c:39 (gdb) quit

EDIT: debug_ap is null, which ultimately causes the segfault.

push

tarek-bochkati push tarek-bochkati/openocd

tarek-bochkati
tarek-bochkati

armv7m.h: relax dependency from 'arm_adi_v5.h'

The include file 'armv7m.h' includes 'arm_adi_v5.h' only to get the definition of 'struct adiv5_ap', but doesn't need the struct content.

Reducing the cross dependencies speeds-up the compile time during code development by avoiding re-compiling file.

Relax the dependency by locally declaring 'struct adiv5_ap' in 'armv7m.h' and remove the include of 'arm_adi_v5.h'. Fix the other files that have now lost the includes file that 'arm_adi_v5.h' depends from.

Change-Id: Ic0d40b17db6045fa43f348bda83eaf211a6b347d Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6468 Tested-by: jenkins Reviewed-by: Daniel Goehring [email protected] Reviewed-by: Tarek BOCHKATI [email protected]

tarek-bochkati
tarek-bochkati

arm_coresight: add include file and use it

Several magic numbers related to ARM CoreSight specification IHI0029E are spread around OpenOCD code.

Define through macros the ARM CoreSight magic numbers and collect them in a single include file. Use the new macros wherever possible.

Change-Id: I9b0c1c651ce4ffbaf08d31791ef16e95983ee4cb Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6446 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI [email protected] Reviewed-by: Daniel Goehring [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: simplify handling of AP type

The complete AP type should include 'class' and 'manufacturer'.

Cleanup the definition of AP type from AP_REG_IDR register. Include the check of 'class', together with manufacturer and type. Add the new MEM-AP from ARM IHI0074C.

Change-Id: Ic8db7c040108ba237b54f73b1abe24b8b853699b Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6447 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI [email protected] Reviewed-by: Daniel Goehring [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: move in a separate function devtype decode/display

For readability, move in a separate function the decoding and the display of devtype register. The function will be reused with ADIv6.

Split from change https://review.openocd.org/6077/

Change-Id: I7a26a2c9759d5db5f9acfae5c169b90b3deb2f18 Signed-off-by: Kevin Burke [email protected] Signed-off-by: Daniel Goehring [email protected] Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6448 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: add helper to search for part number

Improve code readability and prepare to re-use the helper.

Change-Id: Iee5e01047c82be3dd86707f5c283f0b20cc4070d Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6449 Tested-by: jenkins Reviewed-by: Daniel Goehring [email protected] Reviewed-by: Tarek BOCHKATI [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: add arm SoC-600 part numbers

Extract new part numbers from ARM CoreSight System-on-Chip SoC-600 Technical Reference Manual Revision r4p1 and add them to the array dap_partnums.

Change-Id: I88d8aa3c084f6e832b75032e75bfb6d377a08360 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6450 Tested-by: jenkins Reviewed-by: Daniel Goehring [email protected] Reviewed-by: Tarek BOCHKATI [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: add arm Cortex-R52 part numbers

Extract new part numbers from Arm Cortex-R52 Processor Technical Reference Manual Revision r1p3 and add them to the array dap_partnums.

Change-Id: I8020f36de587951af60422ef33d7e438dc7d9d53 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6451 Tested-by: jenkins Reviewed-by: Daniel Goehring [email protected] Reviewed-by: Tarek BOCHKATI [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: add arm Neoverse N1 part numbers

Split from change https://review.openocd.org/6077/

Change-Id: I5e3d3736beb741de3940ea6e23b0ccbf47e8dec7 Signed-off-by: Kevin Burke [email protected] Signed-off-by: Daniel Goehring [email protected] Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6452 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: add arm Neoverse N2 part numbers

Change-Id: Ib7a8c9d460f12762f6d106e9331e84b6d2dec213 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6453 Tested-by: jenkins Reviewed-by: Daniel Goehring [email protected] Reviewed-by: Tarek BOCHKATI [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: drop ANY_ID from table dap_part_nums

The initial version of the table dap_part_nums contains only the part number of the device and not the manufacturer ID. This causes collisions between devices with same part number but from different manufacturer. The table has been extended to include the manufacturer JEDEC code in commit 2f131d3c3004 ("ARM ADIv5: CoreSight ROM decode part number and designer id"). For two old/legacy table's entries reported without manufacturer code it was defined a special ANY_ID manufacturer, meaning skip the check for manufacturer! The two legacy entries report the comment "from OMAP3 memmap", and thanks to the associated string has been possible through Google to identify a Master Report [1] about using OpenOCD with the OMAP3 in a BeagleBoard. The ROM table is printed with OpenOCD command "dap info 1" at page 8 and reports the Peripheral ID required to extract the manufacturer ID that, out of any surprise, belong to Texas Instruments.

Set the two missing manufacturer ID to Texas Instruments JEDEC code.

Remove the now redundant definition and use of ANY_ID.

While revisiting this old code, remove also the useless comment "0x113: what?". It was introduced in commit ddade10d4a93 ("ARM ADIv5: "dap info" gets more readable") and from the same dump in [1] it's clearly another element in OMAP3. It is listed as entry 0x8 in the ROM table and there is no further info available. OpenOCD will anyway list it as: Designer is 0x017, Texas Instruments Part is 0x113, Unrecognized Another link https://elinux.org/BeagleBoardOpenOCD reports the text "Part number 0x113: This is ????", which sounds familiar! No public document from Texas Instruments reports what is this device at address 0x54012000.

[1] Warren Clay Grant - University of Texas at Austin "Implementation of an Open Source JTAG Debugging Development Chain for the BeagleBoard ARM® Cortex A-8" - May 2012 Link: https://repositories.lib.utexas.edu/bitstream/handle/2152/ETD-UT-2012-05-5478/GRANT-MASTERS-REPORT.pdf

Change-Id: I7e007addbb5c6e90303e4e8c110c7d27810fbe9c Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6454 Tested-by: jenkins Reviewed-by: Daniel Goehring [email protected]

tarek-bochkati
tarek-bochkati

arm_tpiu_swo: fix support for deprecated 'tpiu' command before 'init'

Commit dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code") is not handling correctly the old 'tpiu' command if it is run during the config phase (before command 'init').

Move the call to the old event handler 'trace-config' in function jim_arm_tpiu_swo_enable(), so it is correctly executed after 'init'.

Add the call to the old event handler 'trace-config' also during jim_arm_tpiu_swo_disable(), to match the old behaviour.

Add more information while alerting that the event 'trace-config' is deprecated.

Change-Id: If831d9159b4634c74e19c04099d041a6e2be3f2a Signed-off-by: Antonio Borneo borneo.anton[email protected] Fixes: dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code") Reviewed-on: https://review.openocd.org/c/openocd/+/6561 Tested-by: jenkins Reviewed-by: Karl Palsson [email protected]

tarek-bochkati
tarek-bochkati

openocd: prevent jimtcl error message while testing commands

The jimtcl API Jim_GetCommand() sets an error message when the command is not found and flag JIM_ERRMSG is set. OpenOCD is checking if the command has already been registered, thus 'command not found' is the desired case.

Pass flag JIM_NONE to prevent jimtcl from setting the error message.

Change-Id: I3329c2f8722eda0cc9a5f9cbd888a37915b46107 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6562 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

Speed up remote bitbang.

  1. Use TCP_NODELAY, which makes things twice as fast.
  2. Get rid of a bunch of unnecessary socket block/non-block calls, which improves speed another 10% or so.

Change-Id: I415db5746d55374a14564b1973b81e3517f5cb67 Signed-off-by: Tim Newsome [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6534 Tested-by: jenkins Reviewed-by: Jan Matyas [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

driver/linuxgpiod: add support for opendrain srst

Some MCUs (e.g. the STM32F3) directly expose the internal reset line to an external pin. When this signal is driven by a push/pull line, it can actually be inhibited by the external driver. This results in a setup where the MCU cannot reset itself, for example, by a watchdog timeout or a sysreset request. To fix this condition, support for open drain output on the SRST line is required.

Note that because reset_config srst_open_drain is the default, all users of this adapter will switch over to an open drain output unless explicitly configured otherwise.

Signed-off-by: Alex Crawford [email protected] Change-Id: I89b39b03aa03f826ed3c45793412780448940bcc Reviewed-on: https://review.openocd.org/c/openocd/+/6559 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

tcl/stm32wlx.cfg: comply with new jimtcl expr syntax

Change-Id: I2e9fd528817b14396c7643801aeea5c8dde668e0 Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: https://review.openocd.org/c/openocd/+/6557 Reviewed-by: Antonio Borneo [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

target/cortex_m: enhance multi-core examine logs

Giving the example of STM32WL55x the examine log is the following: Info : stm32wlx.cpu0: hardware has 6 breakpoints, 4 watchpoints Info : stm32wlx.cpu1: hardware has 4 breakpoints, 2 watchpoints

After this change the examine log becomes: Info : stm32wlx.cpu0: Cortex-M4 r0p1 processor detected Info : stm32wlx.cpu0: target has 6 breakpoints, 4 watchpoints Info : stm32wlx.cpu1: Cortex-M0+ r0p1 processor detected Info : stm32wlx.cpu1: target has 4 breakpoints, 2 watchpoints

Change-Id: I1873a75eb76f0819342c441129427b38e984f0df Signed-off-by: Tarek BOCHKATI [email protected]

tarek-bochkati
tarek-bochkati

target: reset target examined flag if target::examine() fails

For example: before this change in cortex_m_examine, if we fail reading CPUID we return a failure code but target was set to examined which is not consistent.

Change-Id: I9f0ebe8f811849e54d1b350b0db506cb3fdd58f4 Signed-off-by: Tarek BOCHKATI [email protected]

commit sha: b9916289425c54ba677917d881870431638eb537

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tarek-bochkati push tarek-bochkati/devtools

tarek-bochkati
tarek-bochkati

packgen: create release archive (#8)

tarek-bochkati
tarek-bochkati

buildmgr: Set cbuildgen.rc encoding to UTF-8 (#9)

tarek-bochkati
tarek-bochkati

Source code documentation for RteModel: remaining classes RteCallback and RteProject (#10)

tarek-bochkati
tarek-bochkati

buildmgr: Fix files and components layer assignment matching recognition (#11)

tarek-bochkati
tarek-bochkati

Source code documentation for ErrLog (#14)

tarek-bochkati
tarek-bochkati

Source code documentation for XmlReader (#15)

tarek-bochkati
tarek-bochkati

Sdcmsis 1576 parent (#17)

  • SDCMSIS-1576 Source code documentation for RteModel

Co-authored-by: Evgueni Driouk [email protected]

tarek-bochkati
tarek-bochkati
tarek-bochkati
tarek-bochkati

Updated packchk reference name in packgen (#12)

tarek-bochkati
tarek-bochkati

Fix: Auto Copyright Notice checker only checks for specific copyright (#20)

tarek-bochkati
tarek-bochkati
tarek-bochkati
tarek-bochkati

buildmgr: Add layer compose options (#19)

  • Add layer compose options for setting project name and description
  • Set info name field in extracted layer
  • Update tests and documentation
tarek-bochkati
tarek-bochkati

GH Actions: Enable CI triggered on all branches (#24)

This enables us to trigger the CI in any PR, not only against main branch.

tarek-bochkati
tarek-bochkati

GH Actions: Enable a global workflow (#25)

This workflow is not associated with any product.

tarek-bochkati
tarek-bochkati

Fix issues with filesystem::perms in Windows-GCC (#23)

On Windows a file/dir with full access permissions seems not to have perms::all set. This may be caused by permissions available on POSIX but not on Windows. Instead of testing file/dirs with full access for perms::all the test checks specifically for the permissions of interest.

Fixing usage of gtest EXPECT_EQ for better readability of error messages.

tarek-bochkati
tarek-bochkati

Revert "Updated packchk reference name in packgen (#12)" (#26)

This reverts commit 54d7399d7edc39cbecad9e4c4926a1b0a87e6c60.

tarek-bochkati
tarek-bochkati

buildmgr: 'compilers' requirement shall not be mandatory for layers (#28)

commit sha: b6e1f0968e5c59ce5885ad285aeafeaa6b0ec445

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tarek-bochkati forked Open-CMSIS-Pack/devtools

⚡ Open-CMSIS-Pack development tools - C++
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tarek-bochkati
tarek-bochkati

target: avoid polling during 'resumed' event handler

OpenOCD is based on a single main loop that schedules all the activities. At the execution of a TCL command, the timestamp is checked to eventually trigger the polling of the targets. This means that by executing a TCL command the polling can be triggered and detect a change of target's state.

When openocd 'resumes' a target, the target can halt again by hitting a breakpoint. The 'resumed' event handler is started just after the target has been resumed, but it triggers a polling before the execution of its very first instruction. If the polling finds the target halted, it will run the 'halted' event handler, that will then be executed 'before' the pending 'resumed' handler.

In case of gdb, a 'continue' command will restart the target but, polling (and halt detection) executed before the end of the resume process will hide the halt. As a consequence, the gdb will not be informed of the halt and will remains waiting as if the target is still running without showing the prompt.

This can be verified by running on the target a firmware with a loop, run openocd with a dummy 'resumed' event, and let gdb to set a breakpoint in the loop. A 'continue' command will cause the target to halt again by hitting the breakpoint at the next loop iteration, but gdb will loose it and will not return the prompt.

openocd -f board/st_nucleo_f4.cfg -c \
	'stm32f4x.cpu configure -event resumed {echo hello}'
arm-none-eabi-gdb -ex 'target remote :3333' -ex 'b *$pc' -ex c

Disable the polling while executing target's resume(). Document it and provide hints to developers to cope with future implementation.

Change-Id: I3be830a8e7c2ef6278617cb4547a4d676b0ddeb5 Signed-off-by: Antonio Borneo [email protected] Reported-by: Габитов Александр Фаритович [email protected] Reviewed-on: http://openocd.zylin.com/6074 Reviewed-by: Tomas Vanek [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

tcl/target/eos_s3: fix variable's expansion typo

TCL expands the variables only if preceded by a dollar sign.

Add the missing dollar before the variable's name '_CPUTAPID'.

Change-Id: Icc5d0dddf24f75d12ee63fee69e1b265e842ca43 Signed-off-by: Antonio Borneo [email protected] Reported-by: Wes Cilldhaire [email protected] Fixes: c3166b43e415 ("tcl/target: Add QuickLogic EOS S3 MCU configuration") Reviewed-on: http://openocd.zylin.com/6079 Tested-by: jenkins Reviewed-by: TM [email protected]

tarek-bochkati
tarek-bochkati

The openocd-0.11.0 release

Signed-off-by: Paul Fertser [email protected]

tarek-bochkati
tarek-bochkati

Restore normal development cycle

Signed-off-by: Paul Fertser [email protected]

tarek-bochkati
tarek-bochkati

tcl/target: Add K3 basic support

Add basic connection details for AM654 and J721E SoCs from TI.

See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: https://www.ti.com/lit/pdf/spruid7

See J721E Technical Reference Manual (SPRUIL1, May 2019) for further details: https://www.ti.com/lit/pdf/spruil1

See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1

See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2

Change-Id: Ie5108c6ad6f1304a6bf5b9f81aa9ebd33b8a559d Signed-off-by: Nishanth Menon [email protected] Reviewed-on: http://openocd.zylin.com/5182 Reviewed-by: Antonio Borneo [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

tcl/board: Add AM654 EVM basic support

Add basic connection details with AM654 evm

Change-Id: Iea2240860e50ae42cf6f1617a10e24f63c6dd988 Signed-off-by: Nishanth Menon [email protected] Reviewed-on: http://openocd.zylin.com/5183 Reviewed-by: Antonio Borneo [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

tcl/board: Add J721E EVM basic support

Add basic connection details with J721E EVM

Change-Id: I0c2d25252432914d8e371e81761a59c05924bd8e Signed-off-by: Nishanth Menon [email protected] Reviewed-on: http://openocd.zylin.com/5185 Reviewed-by: Antonio Borneo [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

tcl/board: Add J7200 EVM basic support

Add basic connection details with J7200 EVM

Change-Id: Ia8fa5033a693ac09849d33693c81b8cb206f17c1 Signed-off-by: Nishanth Menon [email protected] Reviewed-on: http://openocd.zylin.com/5951 Reviewed-by: Antonio Borneo [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

tcl/board: Add AM642 EVM basic support

Add basic connection details with AM642 EVM

Change-Id: I95dcf6afadb61bfd8456b79274eae863b834167d Signed-off-by: Nishanth Menon [email protected] Reviewed-on: http://openocd.zylin.com/5952 Reviewed-by: Antonio Borneo [email protected] Reviewed-by: Vignesh Raghavendra Tested-by: jenkins

tarek-bochkati
tarek-bochkati

eMAG: Add Ampere eMAG config files

Add board and target configuration files for Ampere eMAG8180 board and Ampere eMAG processor.

Tested on an Ampere eMAG8180 development platform.

Change-Id: I222653f0fc12d25202a7e469db3594076cbc38ed Signed-off-by: Anthony Ferranti [email protected] Signed-off-by: Daniel Goehring [email protected] Reviewed-on: http://openocd.zylin.com/5569 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

stlink: separate stlink core from USB functions

the introduced stlink_backend_s struct provides an API to separate USB internals from stlink core.

this separation aims to ease:

  • stlink-server integration [1]
  • stlink driver split into modules:
    • stlink_core
    • stlink_usb
    • stlink_tcp [1]

[1] refer to http://openocd.zylin.com/#5633/

Change-Id: Iff6790942612ce1769ec4c75990914534e5e9e24 Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/5632 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

stlink: support of ST-LINK TCP server using stlink-dap and hla

Quote: The ST-LINK TCP server is an application to share the debug interface of a single ST-LINK board among several host applications, typically a debugging tool and a monitoring tool.

Note: ST-Link TCP server does not support the SWIM transport.

ST-LINK TCP server allows several applications to connect to the same ST-Link through sockets (TCP).

To use ST-LINK TCP server:

  • using stlink-dap : use 'st-link backend tcp [port]'
  • using hla : use 'hla_stlink_backend tcp [port]'

the default port value is 7184

Change-Id: I9b79f65267f04b1e978709934892160e65bd2d6d Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/5633 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

tcl/target: add Rockchip RK3399 target

Change-Id: I28f404b1e53fc9dbb04b3f939294ae248bbde183 Signed-off-by: Jiri Kastner [email protected] Reviewed-on: http://openocd.zylin.com/5994 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

rtos: Remove typedef'd struct

The C style guide forbids typedef'd structs, see 'Naming Rules'.

Change-Id: Ia7c8218fb61ff0c74b6dd0d10fb51a77cf059c14 Signed-off-by: Marc Schink [email protected] Reviewed-on: http://openocd.zylin.com/6028 Tested-by: jenkins Reviewed-by: Andreas Fritiofson [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

flash/nand/lpc32xx: Remove typedef'd struct

The C style guide forbids typedef'd structs, see 'Naming Rules'.

Change-Id: I983dd52307136d1b5adb58d8c44c0c14422d31e2 Signed-off-by: Marc Schink [email protected] Reviewed-on: http://openocd.zylin.com/6032 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

target/mips: Remove typedef'd struct

The C style guide forbids typedef'd structs, see 'Naming Rules'.

Change-Id: I449590251056c478c05105cdc18014ab4eb77ed8 Signed-off-by: Marc Schink [email protected] Reviewed-on: http://openocd.zylin.com/6033 Tested-by: jenkins Reviewed-by: Oleksij Rempel [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

target: Remove redundant initialization of endianness

target->endianness is initialized to TARGET_ENDIAN_UNKNOWN at 34 lines below, before calling target_configure. This initialization is redundant and not needed.

Change-Id: Iea2d5e17a13c1a8b0b209ba7c20043736b520ef6 Signed-off-by: Yasushi SHOJI [email protected] Reviewed-on: http://openocd.zylin.com/6039 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

cmsis_dap: remove DAP_MAX_CLOCK

Discussed here:

https://sourceforge.net/p/openocd/mailman/message/35466010/

Change-Id: Ic4d38a872f4b13b794ad0a8a2abdbe5bb21eced3 Signed-off-by: Adrian Negreanu [email protected] Reviewed-on: http://openocd.zylin.com/5964 Tested-by: jenkins Reviewed-by: Bohdan Tymkiv [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

armv7m_trace_itm_config: wait for ITMBusy to be cleared

pg315 of CoreSight Components:

It is recommended that the ITMEn bit is cleared and waits for the ITMBusy bit to be cleared, before changing any fields in the Control Register, otherwise the behavior can be unpredictable.

Change-Id: Ie9a2b842825c98ee5edc9a35776320c668047769 Signed-off-by: Adrian Negreanu [email protected] Reviewed-on: http://openocd.zylin.com/6043 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

drivers/rlink: switch to libusb1

Convert the driver from libusb0 to libusb1.

Change-Id: I17d14522db18b4050d462d23151ec97d3a315a7f Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/5991 Tested-by: jenkins Reviewed-by: Marc Schink [email protected]

commit sha: 6c1e1a212a8c044ae778c526851fe909bf219e90

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tarek-bochkati issue comment STMicroelectronics/OpenOCD

tarek-bochkati
tarek-bochkati

Segfault when trying to connect to target stm32wlx

I have an stlink-v2 hooked up to a newly designed PCB with an stm32wl55ccu7 but can't seem get OpenOCD working. It connects to the target but as soon as I try to connect with gdb, it segfaults due to a null pointer.

EDIT: I have also tried it out with a nucleo wl55jc1 with an stlink-v3 adapter, same error.

Any ideas?

~$ uname -a Linux 32k 4.15.0-51-generic #55-Ubuntu SMP Wed May 15 14:27:21 UTC 2019 x86_64 x86_64 x86_64 GNU/Linux

~/OpenOCD $ > git rev-parse --short HEAD ff701ce82

Reading symbols from openocd...done. (gdb) run Starting program: /usr/local/bin/openocd -d3 -f interface/stlink.cfg -f target/stm32wlx.cfg [Thread debugging using libthread_db enabled] Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1". Open On-Chip Debugger 0.11.0-rc2+dev-00039-gff701ce82-dirty (2021-08-25-16:35) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html User : 13 1 options.c:63 configuration_output_handler(): debug_level: 3 User : 14 1 options.c:63 configuration_output_handler(): Debug: 15 1 options.c:244 add_default_dirs(): bindir=/usr/local/bin Debug: 16 1 options.c:245 add_default_dirs(): pkgdatadir=/usr/local/share/openocd Debug: 17 1 options.c:246 add_default_dirs(): exepath=/usr/local/bin Debug: 18 1 options.c:247 add_default_dirs(): bin2data=../share/openocd Debug: 19 1 configuration.c:42 add_script_search_dir(): adding /home/manne/.config/openocd Debug: 20 1 configuration.c:42 add_script_search_dir(): adding /home/manne/.openocd Debug: 21 1 configuration.c:42 add_script_search_dir(): adding /usr/local/bin/../share/openocd/site Debug: 22 1 configuration.c:42 add_script_search_dir(): adding /usr/local/bin/../share/openocd/scripts Debug: 23 1 configuration.c:97 find_file(): found /usr/local/bin/../share/openocd/scripts/interface/stlink.cfg Debug: 24 1 command.c:146 script_debug(): command - adapter driver hla Debug: 26 1 command.c:146 script_debug(): command - hla_layout stlink Debug: 28 1 hla_interface.c:242 hl_interface_handle_layout_command(): hl_interface_handle_layout_command Debug: 29 1 command.c:146 script_debug(): command - hla_device_desc ST-LINK Debug: 31 1 hla_interface.c:216 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command Debug: 32 1 command.c:146 script_debug(): command - hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 Debug: 34 1 configuration.c:97 find_file(): found /usr/local/bin/../share/openocd/scripts/target/stm32wlx.cfg Debug: 35 1 configuration.c:97 find_file(): found /usr/local/bin/../share/openocd/scripts/target/swj-dp.tcl Debug: 36 1 command.c:146 script_debug(): command - transport select Info : 37 1 transport.c:276 jim_transport_select(): auto-selecting first available session transport "hla_swd". To override use 'transport select '. Debug: 38 1 hla_transport.c:205 hl_swd_transport_select(): hl_swd_transport_select Debug: 39 1 configuration.c:97 find_file(): found /usr/local/bin/../share/openocd/scripts/mem_helper.tcl Debug: 40 1 command.c:146 script_debug(): command - add_usage_text mrw address Debug: 42 1 command.c:1115 help_add_command(): added 'mrw' help text Debug: 43 1 command.c:146 script_debug(): command - add_help_text mrw Returns value of word in memory. Debug: 45 1 command.c:1128 help_add_command(): added 'mrw' help text Debug: 46 1 command.c:146 script_debug(): command - add_usage_text mrh address Debug: 48 1 command.c:1115 help_add_command(): added 'mrh' help text Debug: 49 1 command.c:146 script_debug(): command - add_help_text mrh Returns value of halfword in memory. Debug: 51 1 command.c:1128 help_add_command(): added 'mrh' help text Debug: 52 1 command.c:146 script_debug(): command - add_usage_text mrb address Debug: 54 1 command.c:1115 help_add_command(): added 'mrb' help text Debug: 55 1 command.c:146 script_debug(): command - add_help_text mrb Returns value of byte in memory. Debug: 57 1 command.c:1128 help_add_command(): added 'mrb' help text Debug: 58 1 command.c:146 script_debug(): command - add_usage_text mmw address setbits clearbits Debug: 60 1 command.c:1115 help_add_command(): added 'mmw' help text Debug: 61 1 command.c:146 script_debug(): command - add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits; Debug: 63 1 command.c:1128 help_add_command(): added 'mmw' help text Debug: 64 1 command.c:146 script_debug(): command - transport select Debug: 65 1 command.c:146 script_debug(): command - transport select Debug: 66 1 command.c:146 script_debug(): command - transport select Debug: 67 1 command.c:146 script_debug(): command - swd newdap stm32wlx cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x6ba02477 Debug: 68 1 hla_tcl.c:111 jim_hl_newtap_cmd(): Creating New Tap, Chip: stm32wlx, Tap: cpu, Dotted: stm32wlx.cpu, 8 params Debug: 69 1 hla_tcl.c:121 jim_hl_newtap_cmd(): Processing option: -irlen Debug: 70 1 hla_tcl.c:121 jim_hl_newtap_cmd(): Processing option: -ircapture Debug: 71 1 hla_tcl.c:121 jim_hl_newtap_cmd(): Processing option: -irmask Debug: 72 1 hla_tcl.c:121 jim_hl_newtap_cmd(): Processing option: -expected-id Debug: 73 1 core.c:1488 jtag_tap_init(): Created Tap: stm32wlx.cpu @abs position 0, irlen 0, capture: 0x0 mask: 0x0 Debug: 74 1 command.c:146 script_debug(): command - dap create stm32wlx.dap -chain-position stm32wlx.cpu Debug: 75 1 command.c:146 script_debug(): command - transport select Debug: 76 1 command.c:146 script_debug(): command - target create stm32wlx.m4 cortex_m -endian little -dap stm32wlx.dap Info : 77 1 target.c:5657 target_create(): The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD Debug: 78 1 hla_target.c:203 adapter_target_create(): adapter_target_create Debug: 79 1 hla_target.c:173 adapter_init_arch_info(): adapter_init_arch_info Debug: 80 1 command.c:376 register_command(): command 'tpiu' is already registered in '' context Debug: 81 1 command.c:376 register_command(): command 'rtt' is already registered in '' context Debug: 82 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -work-area-phys 0x20008000 -work-area-size 0x2000 -work-area-backup 0 Debug: 83 1 target.c:2161 target_free_all_working_areas_restore(): freeing all working areas Debug: 84 1 target.c:2161 target_free_all_working_areas_restore(): freeing all working areas Debug: 85 1 target.c:2161 target_free_all_working_areas_restore(): freeing all working areas Debug: 86 1 command.c:146 script_debug(): command - flash bank stm32wlx.flash.m4 stm32l4x 0x08000000 0 0 0 stm32wlx.m4 Debug: 88 1 tcl.c:1319 handle_flash_bank_command(): 'stm32l4x' driver usage field missing Debug: 89 1 command.c:146 script_debug(): command - flash bank stm32wlx.otp.m4 stm32l4x 0x1fff7000 0 0 0 stm32wlx.m4 Debug: 91 1 command.c:376 register_command(): command 'stm32l4x' is already registered in '' context Debug: 92 1 command.c:376 register_command(): command 'lock' is already registered in 'stm32l4x' context Debug: 93 1 command.c:376 register_command(): command 'unlock' is already registered in 'stm32l4x' context Debug: 94 1 command.c:376 register_command(): command 'mass_erase' is already registered in 'stm32l4x' context Debug: 95 1 command.c:376 register_command(): command 'option_read' is already registered in 'stm32l4x' context Debug: 96 1 command.c:376 register_command(): command 'option_write' is already registered in 'stm32l4x' context Debug: 97 1 command.c:376 register_command(): command 'trustzone' is already registered in 'stm32l4x' context Debug: 98 1 command.c:376 register_command(): command 'wrp_desc' is already registered in 'stm32l4x' context Debug: 99 1 command.c:376 register_command(): command 'option_load' is already registered in 'stm32l4x' context Debug: 100 1 command.c:376 register_command(): command 'otp' is already registered in 'stm32l4x' context Debug: 101 1 tcl.c:1319 handle_flash_bank_command(): 'stm32l4x' driver usage field missing Debug: 102 1 command.c:146 script_debug(): command - targets stm32wlx.m4 Debug: 104 1 command.c:146 script_debug(): command - adapter speed 500 Debug: 106 1 core.c:1822 jtag_config_khz(): handle jtag khz Debug: 107 1 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 108 1 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 109 1 command.c:146 script_debug(): command - adapter srst delay 100 Debug: 111 1 command.c:146 script_debug(): command - transport select Debug: 112 1 command.c:146 script_debug(): command - reset_config srst_nogate Debug: 114 1 command.c:146 script_debug(): command - transport select Debug: 115 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event reset-init #4 MHz. #24 MHz clock, compliant with VOS default Range1. #2 WS compliant with VOS=Range1 and 24 MHz. mmw 0x58004000 0x00000102 0 ;#2(Latency) mmw 0x58000000 0x00000091 0 ;#24 MHz #4000

Debug: 116 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event reset-start #4 MHz) adapter speed 500

Debug: 117 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event examine-end global _DUALCORE global _CHIPNAME

# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0

# Stop watchdog counters during halt
# DBGMCU_APB1_FZR1 |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE004203C 0x00001800 0

if { [set _DUALCORE] } {
	targets $_CHIPNAME.m4

	# enable CPU2 boot after reset and after wakeup from Stop or Standby mode
	# PWR_CR4 |= C2BOOT
	mmw 0x5800040C 0x00008000 0
}

Debug: 118 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event trace-config # nothing to do

Info : 119 1 server.c:312 add_service(): Listening on port 6666 for tcl connections Info : 120 1 server.c:312 add_service(): Listening on port 4444 for telnet connections Debug: 121 1 command.c:146 script_debug(): command - init Debug: 123 1 command.c:146 script_debug(): command - target init Debug: 125 1 command.c:146 script_debug(): command - target names Debug: 126 1 command.c:146 script_debug(): command - stm32wlx.m4 cget -event gdb-flash-erase-start Debug: 127 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event gdb-flash-erase-start reset init Debug: 128 1 command.c:146 script_debug(): command - stm32wlx.m4 cget -event gdb-flash-write-end Debug: 129 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event gdb-flash-write-end reset halt Debug: 130 1 command.c:146 script_debug(): command - stm32wlx.m4 cget -event gdb-attach Debug: 131 1 command.c:146 script_debug(): command - stm32wlx.m4 configure -event gdb-attach halt 1000 Debug: 132 1 target.c:1628 handle_target_init_command(): Initializing targets... Debug: 133 1 hla_target.c:193 adapter_init_target(): adapter_init_target Debug: 134 1 semihosting_common.c:99 semihosting_common_init():
Debug: 135 2 hla_interface.c:109 hl_interface_init(): hl_interface_init Debug: 136 2 hla_layout.c:95 hl_layout_init(): hl_layout_init Debug: 137 2 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 138 2 core.c:1789 adapter_khz_to_speed(): have interface set up Debug: 139 2 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 140 2 core.c:1789 adapter_khz_to_speed(): have interface set up Info : 141 2 core.c:1565 adapter_init(): clock speed 500 kHz Debug: 142 2 openocd.c:144 handle_init_command(): Debug Adapter init complete Debug: 143 2 command.c:146 script_debug(): command - transport init Debug: 145 2 transport.c:229 handle_transport_init(): handle_transport_init Debug: 146 2 hla_transport.c:156 hl_transport_init(): hl_transport_init Debug: 147 2 hla_transport.c:173 hl_transport_init(): current transport hla_swd Debug: 148 2 hla_interface.c:42 hl_interface_open(): hl_interface_open Debug: 149 2 hla_layout.c:40 hl_layout_open(): hl_layout_open Debug: 150 2 stlink_usb.c:3542 stlink_open(): stlink_open Debug: 151 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3744 serial: Debug: 152 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3748 serial: Debug: 153 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374b serial: Debug: 154 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374d serial: Debug: 155 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374e serial: Debug: 156 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374f serial: Debug: 157 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3752 serial: Debug: 158 2 stlink_usb.c:3556 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3753 serial: [New Thread 0x7ffff6743700 (LWP 20785)] Info : 159 4 stlink_usb.c:1346 stlink_usb_version(): STLINK V2J29S7 (API v2) VID:PID 0483:3748 Debug: 160 4 stlink_usb.c:1567 stlink_usb_exit_mode(): MODE: 0x02 Info : 161 5 stlink_usb.c:1378 stlink_usb_check_voltage(): Target voltage: 3.151562 Debug: 162 5 stlink_usb.c:1635 stlink_usb_init_mode(): MODE: 0x01 Debug: 163 5 stlink_usb.c:2956 stlink_dump_speed_map(): Supported clock speeds are: Debug: 164 5 stlink_usb.c:2959 stlink_dump_speed_map(): 4000 kHz Debug: 165 5 stlink_usb.c:2959 stlink_dump_speed_map(): 1800 kHz Debug: 166 5 stlink_usb.c:2959 stlink_dump_speed_map(): 1200 kHz Debug: 167 5 stlink_usb.c:2959 stlink_dump_speed_map(): 950 kHz Debug: 168 5 stlink_usb.c:2959 stlink_dump_speed_map(): 480 kHz Debug: 169 5 stlink_usb.c:2959 stlink_dump_speed_map(): 240 kHz Debug: 170 5 stlink_usb.c:2959 stlink_dump_speed_map(): 125 kHz Debug: 171 5 stlink_usb.c:2959 stlink_dump_speed_map(): 100 kHz Debug: 172 5 stlink_usb.c:2959 stlink_dump_speed_map(): 50 kHz Debug: 173 5 stlink_usb.c:2959 stlink_dump_speed_map(): 25 kHz Debug: 174 5 stlink_usb.c:2959 stlink_dump_speed_map(): 15 kHz Debug: 175 5 stlink_usb.c:2959 stlink_dump_speed_map(): 5 kHz Debug: 176 8 stlink_usb.c:1694 stlink_usb_init_mode(): MODE: 0x02 Debug: 177 8 stlink_usb.c:3886 stlink_usb_open_ap(): AP 0 enabled Debug: 178 9 stlink_usb.c:3629 stlink_open(): Using TAR autoincrement: 4096 Debug: 179 9 core.c:640 adapter_system_reset(): SRST line released Debug: 180 111 hla_interface.c:67 hl_interface_init_target(): hl_interface_init_target Debug: 181 111 stlink_usb.c:1927 stlink_usb_idcode(): IDCODE: 0x6BA02477 Debug: 182 111 command.c:146 script_debug(): command - dap init Debug: 184 111 arm_dap.c:106 dap_init_all(): Initializing all DAPs ... Debug: 185 111 openocd.c:161 handle_init_command(): Examining targets... Debug: 186 111 target.c:1816 target_call_event_callbacks(): target event 19 (examine-start) for core stm32wlx.m4 Debug: 187 111 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1 Debug: 188 112 target.c:2578 target_read_u32(): address: 0xe000ed00, value: 0x410fc241 Debug: 189 112 cortex_m.c:2039 cortex_m_examine(): Cortex-M4 r0p1 processor detected Debug: 190 112 cortex_m.c:2050 cortex_m_examine(): cpuid: 0x410fc241 Debug: 191 112 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000ef40 4 1 Debug: 192 113 target.c:2578 target_read_u32(): address: 0xe000ef40, value: 0x00000000 Debug: 193 113 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000ef44 4 1 Debug: 194 113 target.c:2578 target_read_u32(): address: 0xe000ef44, value: 0x00000000 Debug: 195 113 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000edf0 4 1 Debug: 196 114 target.c:2578 target_read_u32(): address: 0xe000edf0, value: 0x00030003 Debug: 197 114 target.c:2666 target_write_u32(): address: 0xe000edfc, value: 0x01000000 Debug: 198 114 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1 Debug: 199 115 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1 Debug: 200 116 target.c:2578 target_read_u32(): address: 0xe0002000, value: 0x00000260 Debug: 201 116 target.c:2666 target_write_u32(): address: 0xe0002008, value: 0x00000000 Debug: 202 116 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1 Debug: 203 117 target.c:2666 target_write_u32(): address: 0xe000200c, value: 0x00000000 Debug: 204 117 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1 Debug: 205 117 target.c:2666 target_write_u32(): address: 0xe0002010, value: 0x00000000 Debug: 206 117 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1 Debug: 207 118 target.c:2666 target_write_u32(): address: 0xe0002014, value: 0x00000000 Debug: 208 118 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1 Debug: 209 119 target.c:2666 target_write_u32(): address: 0xe0002018, value: 0x00000000 Debug: 210 119 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002018 4 1 Debug: 211 120 target.c:2666 target_write_u32(): address: 0xe000201c, value: 0x00000000 Debug: 212 120 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe000201c 4 1 Debug: 213 120 target.c:2666 target_write_u32(): address: 0xe0002020, value: 0x00000000 Debug: 214 120 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002020 4 1 Debug: 215 121 target.c:2666 target_write_u32(): address: 0xe0002024, value: 0x00000000 Debug: 216 121 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0002024 4 1 Debug: 217 122 cortex_m.c:2150 cortex_m_examine(): FPB fpcr 0x260, numcode 6, numlit 2 Debug: 218 122 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1 Debug: 219 123 target.c:2578 target_read_u32(): address: 0xe0001000, value: 0x40000000 Debug: 220 123 cortex_m.c:1868 cortex_m_dwt_setup(): DWT_CTRL: 0x40000000 Debug: 221 123 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0001fbc 4 1 Debug: 222 124 target.c:2578 target_read_u32(): address: 0xe0001fbc, value: 0x00000000 Debug: 223 124 cortex_m.c:1875 cortex_m_dwt_setup(): DWT_DEVARCH: 0x0 Debug: 224 124 target.c:2666 target_write_u32(): address: 0xe0001028, value: 0x00000000 Debug: 225 124 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1 Debug: 226 124 target.c:2666 target_write_u32(): address: 0xe0001038, value: 0x00000000 Debug: 227 124 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1 Debug: 228 125 target.c:2666 target_write_u32(): address: 0xe0001048, value: 0x00000000 Debug: 229 125 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0001048 4 1 Debug: 230 126 target.c:2666 target_write_u32(): address: 0xe0001058, value: 0x00000000 Debug: 231 126 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0001058 4 1 Debug: 232 127 cortex_m.c:1924 cortex_m_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger Info : 233 127 cortex_m.c:2160 cortex_m_examine(): stm32wlx.m4: hardware has 6 breakpoints, 4 watchpoints Debug: 234 127 target.c:1816 target_call_event_callbacks(): target event 21 (examine-end) for core stm32wlx.m4 Debug: 235 127 target.c:4768 target_handle_event(): target(0): stm32wlx.m4 (hla_target) event: 21 (examine-end) action: global _DUALCORE global _CHIPNAME

# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0

# Stop watchdog counters during halt
# DBGMCU_APB1_FZR1 |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE004203C 0x00001800 0

if { [set _DUALCORE] } {
	targets $_CHIPNAME.m4

	# enable CPU2 boot after reset and after wakeup from Stop or Standby mode
	# PWR_CR4 |= C2BOOT
	mmw 0x5800040C 0x00008000 0
}

Debug: 236 127 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1 Debug: 237 128 command.c:146 script_debug(): command - mww 0xE0042004 7 Debug: 238 128 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1 Debug: 239 129 target.c:2578 target_read_u32(): address: 0xe000edf8, value: 0x00000000 Debug: 240 130 armv7m.c:371 armv7m_read_core_reg(): read r0 value 0x00001800 Debug: 241 131 armv7m.c:371 armv7m_read_core_reg(): read r1 value 0x00000000 Debug: 242 132 armv7m.c:371 armv7m_read_core_reg(): read r2 value 0x006000d0 Debug: 243 133 armv7m.c:371 armv7m_read_core_reg(): read r3 value 0x00d00000 Debug: 244 134 armv7m.c:371 armv7m_read_core_reg(): read r4 value 0x40020000 Debug: 245 134 armv7m.c:371 armv7m_read_core_reg(): read r5 value 0x58000038 Debug: 246 135 armv7m.c:371 armv7m_read_core_reg(): read r6 value 0x40013000 Debug: 247 136 armv7m.c:371 armv7m_read_core_reg(): read r7 value 0x00000000 Debug: 248 137 armv7m.c:371 armv7m_read_core_reg(): read r8 value 0x00000000 Debug: 249 138 armv7m.c:371 armv7m_read_core_reg(): read r9 value 0x00000000 Debug: 250 139 armv7m.c:371 armv7m_read_core_reg(): read r10 value 0x00000000 Debug: 251 140 armv7m.c:371 armv7m_read_core_reg(): read r11 value 0x00000000 Debug: 252 141 armv7m.c:371 armv7m_read_core_reg(): read r12 value 0x80000000 Debug: 253 141 armv7m.c:371 armv7m_read_core_reg(): read sp value 0x200014f0 Debug: 254 142 armv7m.c:371 armv7m_read_core_reg(): read lr value 0x1fff2b45 Debug: 255 143 armv7m.c:371 armv7m_read_core_reg(): read pc value 0x1fff246a Debug: 256 144 armv7m.c:371 armv7m_read_core_reg(): read xPSR value 0x41000000 Debug: 257 145 armv7m.c:371 armv7m_read_core_reg(): read msp value 0x200014f0 Debug: 258 146 armv7m.c:371 armv7m_read_core_reg(): read psp value 0x00000000 Debug: 259 147 armv7m.c:371 armv7m_read_core_reg(): read pmsk_bpri_fltmsk_ctrl value 0x00000000 Debug: 260 148 armv7m.c:371 armv7m_read_core_reg(): read msp_ns value 0x41000000 Debug: 261 148 armv7m.c:371 armv7m_read_core_reg(): read psp_ns value 0x200014f0 Debug: 262 149 armv7m.c:371 armv7m_read_core_reg(): read msp_s value 0x00000000 Debug: 263 150 armv7m.c:371 armv7m_read_core_reg(): read psp_s value 0x00000000 Debug: 264 151 armv7m.c:371 armv7m_read_core_reg(): read msplim_s value 0x00000000 Debug: 265 152 armv7m.c:371 armv7m_read_core_reg(): read psplim_s value 0x200014f0 Debug: 266 153 armv7m.c:371 armv7m_read_core_reg(): read msplim_ns value 0x00000000 Debug: 267 154 armv7m.c:371 armv7m_read_core_reg(): read psplim_ns value 0x00000000 Debug: 268 155 armv7m.c:371 armv7m_read_core_reg(): read pmsk_bpri_fltmsk_ctrl_s value 0x00000000 Debug: 269 155 armv7m.c:371 armv7m_read_core_reg(): read pmsk_bpri_fltmsk_ctrl_ns value 0x00000000 Debug: 270 157 armv7m.c:369 armv7m_read_core_reg(): read d0 value 0x0000000000000000 Debug: 271 159 armv7m.c:369 armv7m_read_core_reg(): read d1 value 0x0000000000000000 Debug: 272 161 armv7m.c:369 armv7m_read_core_reg(): read d2 value 0x0000000000000000 Debug: 273 162 armv7m.c:369 armv7m_read_core_reg(): read d3 value 0x0000000000000000 Debug: 274 164 armv7m.c:369 armv7m_read_core_reg(): read d4 value 0x0000000000000000 Debug: 275 166 armv7m.c:369 armv7m_read_core_reg(): read d5 value 0x0000000000000000 Debug: 276 167 armv7m.c:369 armv7m_read_core_reg(): read d6 value 0x0000000000000000 Debug: 277 169 armv7m.c:369 armv7m_read_core_reg(): read d7 value 0x0000000000000000 Debug: 278 171 armv7m.c:369 armv7m_read_core_reg(): read d8 value 0x0000000000000000 Debug: 279 173 armv7m.c:369 armv7m_read_core_reg(): read d9 value 0x0000000000000000 Debug: 280 174 armv7m.c:369 armv7m_read_core_reg(): read d10 value 0x0000000000000000 Debug: 281 176 armv7m.c:369 armv7m_read_core_reg(): read d11 value 0x0000000000000000 Debug: 282 178 armv7m.c:369 armv7m_read_core_reg(): read d12 value 0x0000000000000000 Debug: 283 180 armv7m.c:369 armv7m_read_core_reg(): read d13 value 0x0000000000000000 Debug: 284 181 armv7m.c:369 armv7m_read_core_reg(): read d14 value 0x0000000000000000 Debug: 285 183 armv7m.c:369 armv7m_read_core_reg(): read d15 value 0x0000000000000000 Debug: 286 184 armv7m.c:371 armv7m_read_core_reg(): read fpscr value 0x00000000 Debug: 287 185 hla_target.c:289 adapter_debug_entry(): entered debug state in core mode: Thread at PC 0x1fff246a, target->state: halted Debug: 288 185 target.c:1816 target_call_event_callbacks(): target event 0 (gdb-halt) for core stm32wlx.m4 Debug: 289 185 target.c:1816 target_call_event_callbacks(): target event 1 (halted) for core stm32wlx.m4 Debug: 290 185 hla_target.c:331 adapter_poll(): halted: PC: 0x1fff246a Debug: 292 185 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1 Debug: 293 186 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe004203c 4 1 Debug: 294 187 command.c:146 script_debug(): command - mww 0xE004203C 6144 Debug: 296 188 hla_target.c:618 adapter_write_memory(): adapter_write_memory 0xe004203c 4 1 Debug: 297 189 command.c:146 script_debug(): command - flash init Debug: 299 190 tcl.c:1385 handle_flash_init_command(): Initializing flash devices... Debug: 300 190 command.c:146 script_debug(): command - nand init Debug: 302 190 tcl.c:498 handle_nand_init_command(): Initializing NAND devices... Debug: 303 191 command.c:146 script_debug(): command - pld init Debug: 305 191 pld.c:206 handle_pld_init_command(): Initializing PLDs... Debug: 306 191 command.c:146 script_debug(): command - tpiu init Info : 307 191 gdb_server.c:3503 gdb_target_start(): starting gdb server for stm32wlx.m4 on 3333 Info : 308 191 server.c:312 add_service(): Listening on port 3333 for gdb connections Info : 309 6059 server.c:100 add_connection(): accepting 'gdb' connection on tcp/3333 Debug: 310 6059 breakpoints.c:384 breakpoint_clear_target_internal(): Delete all breakpoints for target: stm32wlx.m4 Debug: 311 6059 breakpoints.c:524 watchpoint_clear_target(): Delete all watchpoints for target: stm32wlx.m4 Debug: 312 6059 target.c:1816 target_call_event_callbacks(): target event 22 (gdb-attach) for core stm32wlx.m4 Debug: 313 6059 target.c:4768 target_handle_event(): target(0): stm32wlx.m4 (hla_target) event: 22 (gdb-attach) action: halt 1000 Debug: 314 6059 command.c:146 script_debug(): command - halt 1000 Debug: 316 6060 target.c:3249 handle_halt_command(): - Debug: 317 6060 hla_target.c:418 adapter_halt(): adapter_halt Debug: 318 6060 hla_target.c:421 adapter_halt(): target was already halted Debug: 319 6060 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0xe0042000 4 1 Debug: 320 6061 target.c:2578 target_read_u32(): address: 0xe0042000, value: 0x10016497 Info : 321 6061 stm32l4x.c:1643 stm32l4_probe(): device idcode = 0x10016497 (STM32WLEx/WL5x - Rev 1.1 : 0x1001) Debug: 322 6061 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0x58004020 4 1 Debug: 323 6062 target.c:2578 target_read_u32(): address: 0x58004020, value: 0x3ffff0aa Info : 324 6062 stm32l4x.c:1659 stm32l4_probe(): RDP level 0 (0xAA) Debug: 325 6062 hla_target.c:603 adapter_read_memory(): adapter_read_memory 0x1fff75e0 2 1 Debug: 326 6063 target.c:2602 target_read_u16(): address: 0x1fff75e0, value: 0x0100 Info : 327 6063 stm32l4x.c:1702 stm32l4_probe(): flash size = 256kbytes

Thread 1 "openocd" received signal SIGSEGV, Segmentation fault. 0x00005555556b38e9 in stm32l4_probe (bank=0x555555c59390) at src/flash/nor/stm32l4x.c:1861 1861 if (armv7m->debug_ap->ap_num == 1) (gdb) bt #0 0x00005555556b38e9 in stm32l4_probe (bank=0x555555c59390) at src/flash/nor/stm32l4x.c:1861 #1 0x00005555556b3d78 in stm32l4_auto_probe (bank=0x555555c59390) at src/flash/nor/stm32l4x.c:1946 #2 0x00005555555f2597 in get_flash_bank_by_num (num=0, bank=0x7fffffffdde0) at src/flash/nor/core.c:299 #3 0x0000555555626a27 in gdb_new_connection (connection=0x555555c777e0) at src/server/gdb_server.c:1004 #4 0x000055555562e056 in add_connection (service=0x555555c73f80, cmd_ctx=0x555555c07260) at src/server/server.c:101 #5 0x000055555562f1ae in server_loop (command_context=0x555555c07260) at src/server/server.c:543 #6 0x00005555555ad3fd in openocd_thread (argc=6, argv=0x7fffffffe0e8, cmd_ctx=0x555555c07260) at src/openocd.c:318 #7 0x00005555555ad4fa in openocd_main (argc=6, argv=0x7fffffffe0e8) at src/openocd.c:360 #8 0x00005555555acda6 in main (argc=6, argv=0x7fffffffe0e8) at src/main.c:39 (gdb) quit

EDIT: debug_ap is null, which ultimately causes the segfault.

tarek-bochkati
tarek-bochkati

Hi demute,

Thank you for reporting the issue. This is probably caused by the usage of "interface/stlink.cfg" which do not support STM32WL multicore debugging.

Could you please switch to -f "interface/stlink-dap.cfg" and check if you have still the same issue.

Best Regards, Tarek

Aug
19
2 months ago
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tarek-bochkati in tarek-bochkati/openocd create tag openocd-cubeide-v1.7.0

createdAt 2 months ago
push

tarek-bochkati push tarek-bochkati/openocd

tarek-bochkati
tarek-bochkati

flash/stm32l4x: add support of STM32U57x/U58x

this device flash registers are quite similar to STM32L5 with this changes :

  • flash size is up to 2MB
  • 2MB variants are always dual bank
  • 1MB and 512KB variants could be dual bank (contiguous addressing) depending on DUALBANK bit(21)
  • flash data width is 16 bytes (quad-word)

Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1 Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: https://gerrit.st.com/c/stm32ide/official/openocd/+/196640 Tested-by: Tarek BOUCHKATI [email protected] Reviewed-by: Tarek BOUCHKATI [email protected]

tarek-bochkati
tarek-bochkati

flash/stm32l4x: switch to to c loader instead of assembly loader

add loader argument for flash_word_size, to permit using the loader with STM32U5.

Change-Id: I24cafc2ba637a065593a0506eae787b21080a0ba Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: https://gerrit.st.com/c/stm32ide/official/openocd/+/197040 Tested-by: CITOOLS [email protected] Reviewed-by: Tarek BOUCHKATI [email protected]

tarek-bochkati
tarek-bochkati

cortex_m: implement hit_watchpoint function

this change aims to provide a better gdb debugging experience, by making gdb understand what's really happening.

before this change when hitting a watchpoint

  • openocd reports "T05" to gdb
  • gdb displays: Program received signal SIGTRAP, Trace/breakpoint trap.

after the change

  • openocd reports "T05watch:20000000;" to gdb

  • gdb displays: Hardware watchpoint 1: *0x20000000

    Old value = 16000000 New value = 170000000 ...

Change-Id: Iac3a85eadd86663617889001dd04513a4211ced9 Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: https://gerrit.st.com/c/stm32ide/official/openocd/+/203072 Tested-by: CITOOLS [email protected] Reviewed-by: Laurent LEMELE [email protected]

tarek-bochkati
tarek-bochkati

fix for unknown device in stm32l4x flash driver

Change-Id: I19547e3275c9e694a81bbd517dcfab552ecff702 Reviewed-on: https://gerrit.st.com/c/stm32ide/official/openocd/+/208362 Tested-by: Tarek BOCHKATI [email protected] Reviewed-by: Tarek BOCHKATI [email protected]

commit sha: ff701ce824203295b161add64373fa1c9ce3e470

push time in 2 months ago
Aug
17
2 months ago
push

tarek-bochkati push tarek-bochkati/openocd

tarek-bochkati
tarek-bochkati

target: rename CamelCase symbols

No major cross dependencies, mostly changes internal to each file/function.

Change-Id: I7cc87458a341bae29a4f772b0af5d97b4bfc2da3 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6343 Tested-by: jenkins Reviewed-by: Marc Schink [email protected]

tarek-bochkati
tarek-bochkati

openocd: fix simple cases of NULL comparison

There are more than 1000 NULL comparisons to be aligned to the coding style. For recurrent NULL comparison it's preferable using trivial scripts in order to minimize the review effort.

Patch generated automatically with the command: sed -i PATTERN $(find src/ -type f) where PATTERN is in the list: 's/(([a-z][a-z0-9_]) == NULL)/(!\1)/g' 's/(([a-z][a-z0-9_]->[a-z][a-z0-9_]) == NULL)/(!\1)/g' 's/(([a-z][a-z0-9_].[a-z][a-z0-9_]*) == NULL)/(!\1)/g'

's/(\([a-z][a-z0-9_]*\) != NULL)/(\1)/g'
's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) != NULL)/(\1)/g'
's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) != NULL)/(\1)/g'

's/(NULL == \([a-z][a-z0-9_]*\))/(!\1)/g'
's/(NULL == \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(!\1)/g'
's/(NULL == \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(!\1)/g'

's/(NULL != \([a-z][a-z0-9_]*\))/(\1)/g'
's/(NULL != \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(\1)/g'
's/(NULL != \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(\1)/g'

Change-Id: Ida103e325d6d0600fb69c0b7a1557ee969db4417 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6350 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

openocd: remove NULL comparisons with checkpatch [1/2]

Patch generated automatically through the new checkpatch with flags "--types COMPARISON_TO_NULL --fix-inplace". This only fixes the comparisons if (symbol == NULL) if (symbol != NULL) The case of NULL on the left side of the comparison is not tested.

Some automatic fix is incorrect and has been massaged by hands: - if (psig == NULL) + if (!psig) changed as + if (!*psig)

Change-Id: If4a1e2b4e547e223532e8e3d9da89bf9cb382ce6 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6351 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

openocd: remove NULL comparisons with checkpatch [2/2]

Patch generated automatically through a modified checkpatch that detects the patterns if (NULL == symbol) if (NULL != symbol) and through flags "--types COMPARISON_TO_NULL --fix-inplace".

The unmodified checkpatch detects this pattern as Yoda condition, but it's odd fixing it as Yoda condition and then again as NULL comparison. This triggered the modification to the script.

Change-Id: I5fe984a85e9c4fc799f049211797aef891ebce18 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6352 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

openocd: manually remove NULL comparisons

For the remaining NULL comparisons, remove then manually.

While there, make more readable a loop, by moving the assigment out of the loop condition.

Change-Id: I44193aaa95813156a3a79c16b80e1ad333dc1eaf Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6353 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

openocd: fix Yoda conditions with checkpatch

The new checkpatch can automatically fix the code, but this feature is still error prone and not complete.

Patch generated automatically through the new checkpatch with flags "--types CONSTANT_COMPARISON --fix-inplace".

Some Yoda condition is detected by checkpatch but not fixed; it will be fixed manually in a following commit.

Change-Id: Ifaaa1159e63dbd1db6aa3c017125df9874fa9703 Signed-off-by: Antonio Borneo [email protected] Reviewed-on: http://openocd.zylin.com/6355 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

arm_adi_v5: Provide Brahma-B53 identifiers

The Broadcom Brahma-B53 CPUs contains a number of custom ROM table entries for its PMU, Debug unit, and a couple of ROM tables.

Change-Id: I1f21f07ed296579c374f24e781325789bf4ebf51 Signed-off-by: Florian Fainelli [email protected] Reviewed-on: http://openocd.zylin.com/6368 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

arm_adi_v5: Added Cortex-A76 identifiers

Add identifiers of the Cortex-A76 ROM and debug unit.

Change-Id: Ieef0d990189d3c0502e8d530874dc9cbca4417d8 Signed-off-by: Florian Fainelli [email protected] Reviewed-on: http://openocd.zylin.com/6358 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

doc: move the official channel to Libera.Chat

Due to Freenode takeover it's likely that most of our users are going to seek support on Libera in the nearest future.

Change-Id: I98db95bab51f4ef2ac854bf521468d22b2794e56 Signed-off-by: Paul Fertser [email protected] Reviewed-on: http://openocd.zylin.com/6297 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI [email protected] Reviewed-by: Antonio Borneo [email protected] Reviewed-by: Marc Schink [email protected]

tarek-bochkati
tarek-bochkati

jtag/aice: fix build with clang on MacOS

Commit fceb29d03ff9 ("jtag/aice: use macros in place of const variables") replaces some 'static const uint8_t' with macros. This breaks the build on MacOS because the macro values are of 'int' type that doesn't match with the printf format 'PRIx8'.

error: format specifies type 'unsigned char' but the
argument has type 'int' [-Werror,-Wformat]

Replace the printf format 'PRIx8' with 'x'. While there, remove a useless cast to uint32_t and fix the printf format too.

Change-Id: Ib87298a61637b75a2813f209e5209d39ab2745f8 Signed-off-by: Antonio Borneo [email protected] Fixes: fceb29d03ff9 ("jtag/aice: use macros in place of const variables") Reviewed-on: http://openocd.zylin.com/6380 Tested-by: jenkins

tarek-bochkati
tarek-bochkati

drivers/bcm2835: Add support for SWDIO direction control pin

Adds a new, optional configuration "bcm2835gpio_swdio_dir_num" to the BCM2835 driver, to control the direction of an external buffer driver IC in SWD mode. For example, this is needed to use a level- shifting buffer, such as the SN74LVC2T45 used on the JTAG Hat

Change-Id: If5c146f310ecf8ceae85443b3670936467d2786d Signed-off-by: Matthew Mets [email protected] Reviewed-on: http://openocd.zylin.com/6371 Reviewed-by: Antonio Borneo [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

interface/jtag_hat: Add interface configuration for the JTAG HAT

This adds support for the Blinkinlabs JTAG Hat, a Raspberry Pi expansion board that provides JTAG and SWD connections via level- shifting buffers.

Change-Id: I228bf6a18890b7c3d6679bbc63bfe39f726d8323 Signed-off-by: Matthew Mets [email protected] Reviewed-on: http://openocd.zylin.com/6372 Reviewed-by: Antonio Borneo [email protected] Tested-by: jenkins

tarek-bochkati
tarek-bochkati

doc/openocd.texi: Add documentation for bcm2835 interface

This adds documentation for the bcm2835 interface configuration parameters to the user manual. Documentation format is based on the FTDI interface section, and was taken from the descriptions in the driver source code.

Change-Id: I77b09b8bd44d8e8fe9cc5fb9de3c3a30550d943c Signed-off-by: Matthew Mets [email protected] Reviewed-on: http://openocd.zylin.com/6376 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

drivers/cmsis-dap: update for newest protocol version

The capabilities INFO command can now return two bytes, without this patch, the capabilities would simply not be read and left as 0 (i.e. no capabilities).

cf. https://arm-software.github.io/CMSIS_5/DAP/html/group__DAP__Info.html ; https://github.com/ARM-software/CMSIS_5/blob/116866fd74756c88096e37cbd0066fadad583cad/CMSIS/DAP/Firmware/Source/DAP.c#L100-L111

Change-Id: Ibd894971edf1c120cae08089e5515ce5e9972323 Signed-off-by: PoroCYon [email protected] Reviewed-on: http://openocd.zylin.com/6373 Tested-by: jenkins Reviewed-by: Andrzej Sierżęga [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

Call poll at a fixed interval.

The existing implementation blocks in select() for a fixed amount of time. This change tracks when the next event (likely poll()) wants to be run, and uses a shorter timeout in select() if necessary.

Also track all these timeouts using milliseconds as returned by timeval_ms() instead of struct timeval to simplify the code.

This feature is helpful if poll() wants to do something like sample PCs or memory values for basically the entire time that otherwise OpenOCD would be hung in select(). See https://github.com/riscv/riscv-openocd/pull/541 for an example of that. The RISC-V code using this change will be upstreamed some day, too.

Signed-off-by: Tim Newsome [email protected] Change-Id: I67104a7cf69ed07c8399c14aa55963fc5116a67d Reviewed-on: http://openocd.zylin.com/6363 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

tcl/board: Add Raspberry Pi 3 board

OpenOCD cannot connect to BCM2837's JTAG interface on RPi 3 board until the reset configuration mode is set as trst_only.

According to Table 6-31 GPIO Pins Alternative Function Assignment of Broadcom's BCM2837 ARM Peripherials datasheet [1] and Raspberry Pi's GPIO control in config.txt document [2], only Test Reset (TRST) pin (no System Reset, SRST) is exposed.

[1] https://usermanual.wiki/Datasheet/BCM2837ARMPeripheralsBroadcom.1054296467/view [2] https://www.raspberrypi.org/documentation/configuration/config-txt/gpio.md

Change-Id: I26ff3924039ff7943faf0a5b1ad0427c8dbb88f2 Link: http://openocd.zylin.com/#6364/1 Signed-off-by: Jian-Hong Pan [email protected] Reviewed-on: http://openocd.zylin.com/6366 Tested-by: jenkins Reviewed-by: Florian Fainelli [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

tcl/board: Add Raspberry Pi 4 model B board

OpenOCD cannot connect to BCM2711's JTAG interface on RPi 4B board until the reset configuration mode is set as trst_only.

According to Table 94. GPIO Pins Alternative Function Assignment of Broadcom's BCM2711 ARM Peripherals datasheet [1] and Raspberry Pi's GPIO control in config.txt document [2], only Test Reset (TRST) pin (no System Reset, SRST) is exposed.

[1] https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf [2] https://www.raspberrypi.org/documentation/configuration/config-txt/gpio.md

Change-Id: I806f0be9700fa0f0944b42c8a651a5731adc762b Link: http://openocd.zylin.com/#6364/1 Signed-off-by: Jian-Hong Pan [email protected] Reviewed-on: http://openocd.zylin.com/6367 Tested-by: jenkins Reviewed-by: Florian Fainelli [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

rtos: zephyr: add zephyr_params for cortex r4

Implementation for Cortex-M does works for Cortex-R too, it allows me to fetch thread list and their backtrace on a Cortex-R platforms.

Change-Id: I23e6eb00879587ba36e0bfb560f7002a9653d39b Signed-off-by: Julien Massot [email protected] Reviewed-on: http://openocd.zylin.com/6369 Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

.github/workflows: Add missing 'apt-get update' to the snapshot workflow

During the build of the OpenOCD snapshot via GitHub Actions, ensure that the local package database is first updated, prior to installing any packages via apt-get install. Otherwise the apt-get install could fail.

Change-Id: If3c29faeb1496d5e2be75350f6352575b1f3a42e Signed-off-by: Jan Matyas [email protected] Reviewed-on: http://openocd.zylin.com/6378 Reviewed-by: Xiaofan [email protected] Tested-by: jenkins Reviewed-by: Tarek BOCHKATI [email protected] Reviewed-by: Tim Newsome [email protected] Reviewed-by: Antonio Borneo [email protected]

tarek-bochkati
tarek-bochkati

github/workflow: upgrade libraries in windows build to latest versions

Change-Id: I11fb6eb948531f1a2e8c0c3926cac52cf92765b9 Reported-by: Xiaofan [email protected] Signed-off-by: Tarek BOCHKATI [email protected] Reviewed-on: http://openocd.zylin.com/6383 Reviewed-by: Xiaofan [email protected] Tested-by: jenkins Reviewed-by: Antonio Borneo [email protected]

commit sha: 0f409b1a6e44b81a8864a7d9ffaf09f20a4e2c2e

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tarek-bochkati
tarek-bochkati

github/workflow: disable libusb static link for windows build

Change-Id: I9c7cb0b8853459ca48589674498403e255ade5cc Reported-by: Xiaofan [email protected] Signed-off-by: Tarek BOCHKATI [email protected]

commit sha: 1b505a6da7b2d6291efe7b9eb5cfef2e66728414

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tarek-bochkati push tarek-bochkati/openocd

tarek-bochkati
tarek-bochkati

github/workflow: disable libusb static link for windows build

Change-Id: I9c7cb0b8853459ca48589674498403e255ade5cc Reported-by: Xiaofan [email protected] Signed-off-by: Tarek BOCHKATI [email protected]

commit sha: a6b07376c1026af5bbc4e1cade3d7536cc992c2b

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tarek-bochkati push tarek-bochkati/openocd

tarek-bochkati
tarek-bochkati

github/workflow: disable libusb static link for windows build

Change-Id: I9c7cb0b8853459ca48589674498403e255ade5cc Reported-by: Xiaofan [email protected] Signed-off-by: Tarek BOCHKATI [email protected]

commit sha: 03b98f6f5e0257cbb26b5d1f5ada3f515d3e056c

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tarek-bochkati push tarek-bochkati/openocd

tarek-bochkati
tarek-bochkati

github/workflow: disable libusb static link for windows build

Change-Id: I9c7cb0b8853459ca48589674498403e255ade5cc Reported-by: Xiaofan [email protected] Signed-off-by: Tarek BOCHKATI [email protected]

commit sha: b54bd00a704d71fa80ec4b87fe56169d6e02d5bf

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tarek-bochkati push tarek-bochkati/openocd

tarek-bochkati
tarek-bochkati

github/workflow: disable libusb static link for windows build

Change-Id: I9c7cb0b8853459ca48589674498403e255ade5cc Reported-by: Xiaofan [email protected] Signed-off-by: Tarek BOCHKATI [email protected]

commit sha: 9d3128a00a0b54d909f0b30de4041a542b7b3103

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